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**Intro:...
**Quote style:...
**Cant find a chip?...
**Why this document is not GPL or a wiki...
**Definition of a chip set:...
**'chip set', 'chip-set' or 'chipset'?...
**What's not included:...
**Who made the first chip set?...
**Spelling errors/mistyped words...
**Info needed on:...
**A note on VESA support of 486 chipsets....
**Datasheets:...
*_IBM...
**IBM PC/XT/AT...
*ACC Micro...
**Notes:...
**ACC82010 AT Chip Set (286 12.5/16MHz Max) c88...
***info:...
****General:...
****ACC 2000 Multifunctional Peripheral Controller:...
****ACC 2100 System Bus Controller:...
****ACC 2220 Data Buffers or Address Buffers:...
***Configurations:...
***Features:...
****General:...
****ACC 2000 Multifunctional Peripheral Controller:...
****ACC 2100 System Bus Controller:...
****ACC 2220 Data Buffers or Address Buffers:...
**ACC82020 Turbo PC/AT Chip Set (286/386SX 25MHz Max) c88...
***Notes:...
***info:...
****General:...
****ACC 2000 Multifunctional Peripheral Controller:...
****ACC 2120 System Bus Controller and Memory Controller:...
****ACC 2220 Data Buffers or Address Buffers:...
***Configurations:...
***Features:...
****General:...
****ACC 2000 Multifunctional Peripheral Controller:...
****ACC 2120 System Bus Controller and Memory Controller:...
****ACC 2220 Data Buffers or Address Buffers:...
**ACC82021 Turbo PC/AT Chip Set (286/386SX 25MHz Max) >88...
***Notes:...
***info:...
****General:...
****ACC 2000 Multifunctional Peripheral Controller:...
****ACC 2121 System Bus Controller and Memory Controller:...
****ACC 2220 Data Buffers or Address Buffers:...
***Configurations:...
***Features:...
****General:...
****ACC 2000 Multifunctional Peripheral Controller:...
****ACC 2121 System Bus Controller and Memory Controller:...
****ACC 2220 Data Buffers or Address Buffers:...
**ACC82300 386 AT Chip Set (386DX) c88...
***Info:...
****General:...
****ACC 2000 PC/AT integrated Bus & Peripheral Controller:...
****ACC 2300 Page/Page Interleaved Memory Controller:...
****ACC 2500 System Controller:...
***Configurations:...
***Features:...
****General:...
****ACC 2000 PC/AT integrated Bus & Peripheral Controller:...
****ACC 2300 Page/Page Interleaved Memory Controller:...
****ACC 2500 System Controller:...
**ACC82C100 Single-Chip PC/XT Systems-Controller c90...
***Info:...
***Configurations:...
***Features:...
**ACC83000 Model 30 Integrated Chip Set (MCA) c88...
***Info:...
****General:...
****ACC3000 I/O controller:...
****ACC3100 System Controller:...
***Configurations:...
***Features:...
****General:...
****ACC3000 I/O controller:...
****ACC3100 System Controller:...
**ACC85000/A Model 50/60 Chipset (MCA) c88...
***Info:...
****General:...
****ACC 5000 DMA and Micro Channel Controller:...
****ACC 5100 Peripheral Interface Controller:...
****ACC 5200 Data Buffer Logic:...
****ACC 5300 Memory Controller and Buffers:...
***Configurations:...
***Features:...
****General:...
****ACC 5000 DMA and Micro Channel Controller:...
****ACC 5100 Peripheral Interface Controller:...
****ACC 5200 Data Buffer Logic:...
****ACC 5300 Memory Controller and Buffers:...
**ACC1000 Turbo PC/XT Integrated Bus and Peripheral Ctrl. 04/02/88...
***Info:...
***Configurations:...
***Features:...
**ACC2036 Single Chip Solution 2036 (286/386SX) <Jul92...
***Info:...
***Configurations:...
***Features:...
**ACC2046/ST 486DX/486SX/386DX Single Chip AT <Jul92...
***Info:...
***Configurations:...
***Features:...
**ACC2048 WB 486 Notebook/Embedded Single Chip [no datasheet] ?...
***Notes:...
***Info:...
***Configurations:...
**ACC2051/NT PCI Single Chip Solution for Notebook Applications c96...
***Info:...
***Configurations:...
***Features:...
**ACC2056 ?Pentium 3.3V Notebook [no datasheet]<Jan96...
***Notes:...
***Configurations:...
**ACC2057 PCI Notebook/Embedded Single Chip [no datasheet]<Aug96...
***Notes:...
***Info:...
***Configurations:...
**ACC2066NT 486 Notebook/Embedded Single Chip [no datasheet] ?...
***Notes:...
***Info:...
***Configurations:...
**ACC2086 486 VL-based System Super Chip Soluti[no datasheet] ?...
***Notes:...
***Info:...
***Configurations:...
**ACC2087 Enhanced Super Chip (486 Single Chip) <Aug96...
***Info:...
***Configurations:...
***Features:...
**ACC2089 486 PCI-based System Super Chip [no datasheet] ?...
***Notes:...
***Info:...
***Configurations:...
**ACC2168/GT 32-bit 486 Green System Single Chip [no datasheet] ?...
***Notes:...
***Info:...
***Configurations:...
**ACC2178A 32-bit 486 Green System Single Chip [no datasheet] ?...
***Notes:...
***Info:...
***Configurations:...
**ACC2268 ?486 [no datasheet] ?...
***Configurations:...
**ACC???? Maple/Maple-133 486-System-On-Chip [no datasheet] ?...
***Notes:...
**
**Support Chips:
**ACC2016 Buffer and MUX Logic c96...
***Info:...
***Versions:...
***Features:...
**ACC2020 Power Management Chip c92...
***info:...
***Versions:...
***Features:...
**ACC5500 Multifunction I/O Control Chip for PS2 Model 50/60 c88...
***Info:...
***Versions:...
***Features:...
**
**Other chips...
*ALD...
**Notes:...
**Chips with no datasheet:...
**93C488 5x86/486 Single Chip PCI controller <Aug96...
***Info:...
***Configurations:...
***Features:...
*ALi...
**Notes:...
**M1207 286 Single Chip [no datasheet] ?...
***Notes:...
**M1217/M1209 386SX/SLC Single Chip (40MHz) [no datasheet] c91...
***Notes:...
**M1219 386DX/486 ISA Cache? Single Chip [no datasheet] ?
**M1419 386DX/486 ISA Cache Single Chip [no datasheet] c91
**Ml429/31/35 486 VLB/PCI/ISA [no datasheet, some info] cOct93...
***Notes:...
***Configurations:...
**M1439/31/45 486 VLB/PCI/ISA [no datasheet, some info] <May95...
***Notes:...
***Configurations:...
**M1489/87 FinALi-486 PCI Chipset <Feb95...
***Info:...
***Configurations:...
***Features:...
**M???? Genie, Quad Pentium [no datasheet, some info] c95...
***Notes:...
**M1451/49 Aladdin (Pentium) [no datasheet] ?...
***Configurations:...
**M1511/12/13 Aladdin II (Pentium) [no datasheet, some info] >Apr95...
***Notes:...
***Configurations:...
**M1521/23 Aladdin III 50-66MHz <Nov96...
***Info:...
****M1521 System Controller:...
****M1523 PCI-to-ISA Bridge:...
***Configurations:...
***Features:...
****M1521 System Controller:...
****M1523 PCI-to-ISA Bridge:...
**M1531/33/43 Aladdin IV & IV+ 50-83.3MHz <05/28/97...
***Info:...
****M1531 CPU-to-PCI bridge, Memory, Cache and Buffer Controller:...
****M1533 PCI-to-ISA Bus Bridge:...
***Configurations:...
***Features:...
****M1531 CPU-to-PCI bridge, Memory, Cache and Buffer Controller:...
****M1533 PCI-to-ISA Bus Bridge:...
**M1541/42/33/43 Aladdin V & V+ 50-100MHz ?...
***Info:...
****M1541/1542 AGP/CPU-to-PCI bridge/Memory/Cache and Buffer Ctrl.:...
****M1543/C PCI-to-ISA Bus Bridge with Super I/O & Fast IR:...
***Configurations:...
***Features:...
****M1541/1542 AGP/CPU-to-PCI bridge/Memory/Cache and Buffer Ctrl.:...
****M1543/C PCI-to-ISA Bus Bridge with Super I/O & Fast IR:...
**M1561/43/35D Aladdin 7 ArtX [no datasheet, some info] 11/08/99...
***Notes:...
***Info & Features:...
***Configurations:...
**M6117 386SX Single Chip PC <97...
***Notes:...
***Info:...
***Versions:...
***Features:...
**
**Support Chips:
**M1535/D South Bridge ?...
***Info:...
***Versions:...
***Features:...
**
**May not exist:...
**Later Chipsets:...
***PII...
***Athlon...
**Other:...
*AMD . . . . . . . [no datasheets, some info]...
**AMD Am286ZX/LX (286 Embeded CPU + integrated peripherals) ?
**AMD Elan Series (386/486 Embeded CPU + integrated peripherals) ?
**AMD 640/645 (Pentium Based on VIA VT82C590) [some info] c97...
**Later Chipsets:...
*Chips & Technologies...
**CS8220 PC/AT compatible CHIPSet (82C201/C202/A203/A204/A205)cOct85...
***Notes:...
***Info:...
****General:...
****82C201 (8Mhz) or 82C201-10 (10Mhz):...
****82C202: ...
****82A203:...
****82A204:...
****82A205:...
***Configurations:...
***Features;...
**CS8221 NEW Enhanced AT (NEAT) (82C211/82C212/82C215/82C206) c86...
***Info:...
***Configurations:...
***Features:...
**CS8223 LeAPset [no datasheet] ?
**CS8225 CHIPS/250 PS/2 50/60 [no datasheet, some info] c88...
**CS8227 CHIPSlite (82C235/82C641) ?...
***Notes:...
***Info:...
***Configurations:...
***Features:...
**CS8230 386/AT (82C301/302/303/304/305/306)cFeb87...
***Notes:...
***Info:...
***Configurations:...
***Features:...
**CS8231 TURBO CACHE-BASED 386/AT (82C301/307/303/304/305/306) c86...
***Info:...
***Configurations:...
***Features:...
**CS8232 CMOS 386/AT (82C301/302/303/304/305/306) c86...
***Notes:...
**CS8233 PEAK/386 AT (Cached) (82C311/82C315/82C316) c:Dec90...
***Info:...
***Configurations:...
***Features:...
**CS8236 386/AT (82C301/2/3/4/5/6/206) c86...
***Notes:...
**CS8237 TURBO CACHE-BASED 386/AT (82C301/7/3/4/5/6/206) c86...
***Notes:...
**CS8238 CHIPS/280 & 281 (386 MCA)(82C321/322/325/223/226) c:Aug89...
***Info:...
***Configurations:...
***Features:...
**CS82310 PEAK/DM 386 AT (82C351/82C355/82C356) c91...
***Info:...
***Configurations:...
***Features:...
**CS8281 NEATsx (386SX) (82C811/812/215/206) c:Dec89...
***Info:...
***Configurations:...
***Features:...
**CS8283 LeAPset-sx (82C841/82C242/82C636) c:Mar90...
***Info:...
***Configurations:...
***Features:...
**CS8285 PEAKsx (82C836/82C835) c91...
***Info:...
***Configurations:...
***Features:...
**CS8288 CHIPSlite-sx (82C836/82C641/82C835) c?...
***Notes:...
***Configurations:...
**CS4000 WinCHIPS (64200/84021/84025) c92...
***Info:...
***Configurations:...
***Features:...
**CS4021 ISA/486 (84021/84025) c92...
***Info: ...
***Configurations:...
***Features:...
**CS4031 CHIPSet (84031/84035) 5/10/93...
***Info:...
***Configurations:...
***Features:...
**CS4041/5 CHIPSet (84041/84045) 2/10/95...
***Info:...
***Configurations:...
***Features:...
**CB8291 ELEAT [no datasheet] c90...
***Notes:...
**CB8295 ELEATsx [no datasheet] c90...
**82C100 IBM PS/2 Model 30/Super XT ?...
***Info:...
***Configurations:...
***Features:...
**82C110 IBM PS/2 Model 30/Super XT ?...
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82C235 Single Chip AT (SCAT) c89...
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82C836 Single Chip 386sx (SCATsx) <91...
***Info:...
***Configurations:...
***Features:...
**F8680/A PC/CHIP Single-Chip PC c93...
***Notes:...
***Info:...
***Configurations:...
***Features...
**
**Support Chips:
**64200 (Wingine) High Performance 'Windows Engine' c:Oct91...
***Info:...
****General:...
****Wingine/CS4021 Interface:...
****Wingine/CS82310 Interface:...
****More:...
***Versions:...
***Features:...
**82C206 Integrated Peripheral Controller c86...
***Info:...
***Versions:...
***Features:...
**82C601/A Single Chip Peripheral Controller <08/30/90...
***Notes:...
***Info:...
***Versions:...
***Features:...
**82C607 Multifunction Controller <Jun88...
***Info:...
***Versions:...
***Features:...
**82C710 Universal Peripheral Controller c:Aug90...
***Info:...
***Versions:...
***Features:...
**82C711 Universal Peripheral Controller II c:Jan91...
***Info:...
***Versions:...
***Features:...
**82C712 Universal Peripheral Controller II c:Jan91...
***Info:...
***Versions:...
***Features:...
**82C721 Universal Peripheral Controller III c:May93...
***Info:...
***Versions:...
***Features:...
**82C735 I/O Peripheral Controller With Printgine c:Jul93...
***Info:...
***Versions:...
***Features:...
**82C835 Single CHIP 386sx AT Cache Controller c:Apr91...
***Info:...
***Versions:...
***Features:...
**F87000 Multi-Mode Peripheral Chip 11/23/93...
***Info:...
***Versions:...
***Features:...
**Other:...
**Disk:...
**Video:...
*Contaq . . . . . [no datasheets, some info]...
**82C591/2 3/486 <Mar92...
**82C593 3/486 [no datasheet] <May92...
**82C596/A 3/486 Writeback Cache [no datasheet] <11/11/92...
**?????? 486 EISA chipset [no datasheet] <Feb93...
**82C599 PCI-VLB Bridge [no datasheet, some info] ?...
**82C693 PCI-ISA Bridge [no datasheet] ?...
*Efar Microsystems [no datasheets, some info]...
**EFAR-8290WB 386/486 Writeback PC/AT Chipset [no datasheet] ?...
***Notes:...
***Info:...
***Configurations:...
**82EC798 386/486 Writeback PC/AT Single Chip [no datasheet] ?
**Other:...
*ETEQ...
**?????? "Cougar/Bobcat" 386DX/486DX chipset [no datasheet] cNov91...
***Notes:...
***Configurations:...
**?????? "Bengal" 386DX/486 (WriteBack) [no datasheet] cNov91...
***Notes:...
***Configurations:...
**ET2000 386/486 WB Chipset ?...
***Info:...
***Configurations:...
***Features:...
**ET6000 "Cheetah" 486DX/SX Non-Cache System <Apr92...
***Info:...
***Configurations:...
***Features:...
**ET9000 "Jaguar" 486 Write Back Cache AT Single Chip <Jun92...
***Info:...
***Configurations:...
***Features:...
**ET9800/391 "Firefox" 386SX Write Back chipset [no datasheet] ?...
***Configurations:...
**82C390SX "Panda" S.C. 386SX Direct Mapped Cache [no d.sheet]cFeb92...
***Notes:...
**66x8 VIA clones [no datasheet] ?...
***Notes:...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel
**IBM PC/XT/AT Chip Sets...
**82230/82231 High Integration AT-Compatible Chip Set(ZyMOS) c:Aug88...
**82310 Micro Channel Compatible Peripheral Chip Set 04/21/88...
**82311 High Integration MCA Compatible Perip. Chip Set 11/14/88...
**82320 MCA compatible Chipset [no datasheet] 04/10/89...
**82340DX Chip Set (VLSI) (82346/82345/82355) 01/08/90...
**82340SX Chip Set (VLSI) (82343/82344) 01/25/89...
**82350 EISA Chip Set 07/10/89...
**82350DT EISA Chip Set 04/22/91...
**82420TX/ZX PCIset (for 486) TX (Saturn), ZX (Saturn II) c:Nov92...
**82420EX PCIset (for 486) EX (Aries) (82425EX/82426EX) <Dec94...
**82430LX PCIset (Pentium) LX (Mercury) (82433LX/82434LX) 03/22/93
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82430NX PCIset (Pentium) NX (Neptune) (82433NX/82434NX) Mar94...
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82430FX PCIset (Pentium) FX (Triton I) (82437FX/82438FX)01/31/95...
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82430MX PCIset (Pentium) MX (Mobile Triton)(82437/438MX)11/01/95...
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82430HX PCIset (Pentium) HX (Triton II) (82439HX) 02/12/96...
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82430VX PCIset (Pentium) VX (Triton II) (82437VX/82438) 02/12/96...
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82430TX PCIset (Pentium) TX (Triton II) (82439TX) 02/17/97...
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82450KX/GX PCIset (Pentium Pro) KX/GX (Mars/Orion) 11/01/95...
***Notes:...
***Info:...
***Configurations:...
***Features:...
**
**Support Chips:
**82091AA Advanced Interface Peripheral (AIP) c93...
***Notes:...
***Info:...
***Versions:...
***Features:...
**8289 Bus Arbiter (808x) c79...
***Notes:...
***Info:...
***Versions:...
***Features:...
**82289 Bus Arbiter for iAPX 286 Processor Family c83...
***Info:...
***Info:...
***Versions:...
***Features:...
**82258 Advanced Direct Memory Access Coprocessor(ADMA) 01/01/84...
***Notes:...
***Info:...
***Versions...
***Features:...
**82335 High-Integration Interface Device For 386SX c:Nov88...
***Notes:...
***Info:...
***Versions:...
***Features:...
**82360SL I/O Subsystem 10/05/90...
***Notes:...
***Info:...
***Versions:...
***Features:...
**82370 Integrated System Peripheral (for 82376) c:Oct88...
***Notes:...
***Info:...
***Versions:...
***Features:...
**82371FB/SB PCI ISA IDE Xcelerator 82371FB/82371SB (PIIX/3) 01/31/95...
***Notes:...
***Info:...
***Versions:...
***Features:...
**82371MX Mobile PCI I/O IDE Xcelerator (MPIIX) 11/01/95...
***Notes:...
***Info:...
***Versions:...
***Features:...
**82371AB PCI-TO-ISA / IDE Xcelerator 82371AB (PIIX4) 02/17/97...
***Notes:...
***Info:...
***Versions:...
***Features:...
**82374/82375 PCI-EISA Bridge (82374EB/82375EB, 374SB/375SB) c:Mar93...
***Notes:...
***Info:...
***Versions:...
***Configurations:...
***Features:...
**82378 System I/O (SIO) (82378IB and 82378ZB) c:Mar93...
***Notes:...
***Info:...
***Versions:...
***Features:...
**82379AB System I/O-APIC (SIO.A) <Dec94...
***Notes:...
***Info:...
***Versions:...
***Features:...
**82380 32-bit DMA Controller w/ Integrated Peripherals 02/01/87...
***Notes:...
***Info: ...
***Versions:...
***Features:...
**82380FB/AB PCIset: 82380FB Mobile PCI-to-PCI Bridge(MPCI2) 02/17/97...
***Notes:...
***Info:...
***Versions:...
***Features:...
**82384 Clock Generator and Reset Interface c86...
***Notes:...
***Info:...
***Versions:...
***Features:...
**82385 32-bit Cache Controller for 80386 09/29/87...
***Notes:...
***Info:...
***Versions:...
***Features:...
**82385SX 32-bit Cache Controller for 80386SX 01/25/89...
***Notes:...
***Info:...
***Versions:...
***Features:...
**82395DX High Performance Smart Cache 06/18/90...
***Notes:...
***Info:...
***Versions:...
***Features:...
**82395SX Smart Cache 12/17/90...
***Notes:...
**82396SX Smart Cache 12/17/90...
***Notes:...
***Info:...
***Versions:...
***Features:...
**82485 Turbo Cache (and 485Turbocache) c90...
***Notes:...
***Info:
The 82485 is a second-level cache controller designed to improve the
performance of Intel486 Microprocessor systems. One 82485 cache
controller supports 64K or 128K bytes of second level cache memory
that maps to the entire 4 Gigabytes of the Intel486 microprocessor
address space. The controller is completely software transparent. One
controller plus SRAMs provides a 64K or a 128K cache. External EPROM
can be cached yet remain write protected. The 82485 is fully
compatible with the Intel486 microprocessor. All Intel486 CPU bus
cycles and timings are supported.
A complete, optional second level cache controller using the 82485 is
available as the 485Turbocache Module from Intel (data sheet order
number 240722).
2.0 FUNCTIONAL DESCRIPTION
2.1 Introduction
The 82485 is a single ported, two-way set associative cache controller
designed specifically to interface with the Intel486 microprocessor.
The controller supports either a sectored configuration (two lines per
tag) or a non-sectored configuration (one line per tag). The 82485
will directly support a nonsectored 64K data cache or a 128K sectored
data cache. Both the 64K and 128K configurations are able to map the
entire 4 gigabytes of the Intel486 microprocessor address space. The
82485 interfaces directly to the Intel486 microprocessor. All Intel-
486 CPU bus cycles and timings are supported. The 82485 also supports
0 wait state processor operation when there is a cache hit and has
provisions to support invalidation cycles, BOFF# cycles, and premature
BLAST# terminations. The controller is look aside (monitors bus act-
ivity in parallel to the processor) and write through (all writes pro-
pagate to the system bus), so it supports the same cache consistency
mechanisms as the Intel486 CPU. The controller also provides a safe
method to cache ROM BIOS through the use of a write protect pin and a
write protect strapping option.
The data cache (Static RAM) resides external to the 82485. The 82485
provides all controls for the SRAMs. No external latches or tran-
ceivers are required. The 82485 output buffers support up to eight
SRAMs. A 64K cache can be designed with only five components; nine
components for a 128K cache. Two-way set associativity is provided by
dual banked SRAMs. Data parity is supported.
The 82485 can be used to design a custom second level cache
configuration. For an easier system design and higher integration, the
82485M Turbocache can be used (see data sheet order number 240722).
This module is a complete second level cache in one package. It
consists of a single 82485 cache controller and SRAM to provide a
complete 64K or 128K second level Intel486 microprocessor second level
cache.
***Versions:...
***Features:...
**82489DX Advanced Programmable Interrupt Controller 10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
**Notes:...
**GC101/102 12/16MHz PC/AT Compatible Chip Set c:Feb88...
**GC101/102/103 12/16MHz PC/AT Compatible Chip Set + EMS 4.0 c:Jul89...
**GCK113 80386 AT Compatible Chip Set c:oct89...
**GCK181 Universal PS/2 Chip Set c:Mar89...
**HT11 Single 286 AT Chip [no datasheet] <Aug90...
**HT12/+/A Single 286 AT Chip with EMS support c:Aug90...
**HT18 80386SX Single Chip c:Sep91...
**HT21 386SX/286 Single Chip (20 MHz) c:Aug91...
**HT22 386SX/286 Single Chip (25 MHz) c:Sep91...
**HT25 3-volt Core Logic for 386SX c:Dec92...
**HT35 Single-Chip Peripheral Controller [partial info] ?...
**HTK320 386DX Chip Set c:Sep91...
**HTK340 "Shasta" 486 Chip Set c:Jun92...
**Support Chips:
**HT44 Secondary Cache c:Jun92...
**Other:...
*HMC (Hulon Microelectronics)...
**HMC82C206 Integrated Peripherals Controller (10MHz C&T 82c206) ?...
*Logicstar...
**SL600X PC / AT Compatible Chipset (10/12MHz) <Jul87...
**Support Chips:
**SL6012 Memory Mapper for PC-AT (74LS612 compatible) <Jul87...
**SL9010 System Controller (80286/80386SX/DX, 16/20/25MHz) <oct88...
**SL9020 Data Controller <oct88...
**SL9025 Address Controller <oct88...
**SL9090 Universal PC/AT Clock Chip <oct88...
**SL9250 Page Mode Memory Controller (16/20MHz 8MB Max) <oct88...
**SL9350 Page Mode Memory Controller (16/20/25MHz 16MB Max) <oct88...
**Other:...
*Motorola...
**IBM AT: MC146818 Real Time Clock <84...
*OPTi...
**82C263 SCNB Single Chip Notebook c:92...
**82C281/282 Cache Sx/AT (386SX) <08/22/91...
**82C283 386SX System Controller c:91...
**82C291 SXWB PC/AT Chipset (386SX) c:91...
**82C295 SLCWB PC/AT Chipset (386SX) ?...
**82C381/382 HiD/386 (386DX) c:89...
**82C391/392 386WB PC/AT Chipset (386DX) <Dec90...
**82C461/462 Notebook PC/AT chipset [no datasheet] ?...
**82c463 SCNB Single Ship Notebook c:92...
**82c465MV/A/B Single-Chip Mixed Voltage Notebook Solution <Oct97...
**82C481?/482? HiP/486 & HiB/486 [no datasheet] Oct89...
**82C491/392 486WB PC/AT Chipset <04/21/91...
**82C493/392 486SXWB <10/21/91...
**82C495SX/392SX LCWB PC/AT chipset [no datasheet] ?...
**82C495SLC DXSLC 386/486 Low Cost Write Back c:92...
**82C495XLC PC/AT Chip Set c:93...
**82c496A/B DXBB PC/AT Chipset <Mar92...
**82C496/7 DXBB PC/AT Chipset (Cached) <01/16/92...
**82C498 DXWB PC/AT chipset [no datasheet] ?...
**82C499 DXSC DX System Controller c:93...
**82C546/547 Python PTM3V c:94...
**82C556/7/8 Viper [no datasheet] ?...
**82C556/7/8N Viper-N Viper Notebook Chipset <05/25/95...
**82C556M/7M/8E Viper-N+ Viper Notebook Chipset c:96...
**82C566/7/8 Viper-Max Chipset Scalable MultiMedia PC Solution ?...
**82C571/572 486/Pentium c:93...
**82C576/7/8 Viper Xpress [no datasheet] ?...
**82C576/8/9 Viper XPress+ [no datasheet, some info] <01/16/97...
**82C596/597 PTMAWB Pentium Adaptive Write-back (Cobra) c:93...
**82C650/1/2 Discovery (Pentium Pro) [no datasheet] ?...
**82C681/2/6/7 386/486WB EISA c:92...
**82C683 386/486AWB EISA [no datasheet] ?...
**82C693/6/7 Pentium uP Write Back Cache EISA c:93...
**82C700 FireStar c:97...
**82C701 FireStar Plus c:97...
**82C750 Vendetta [no datasheet] ?...
**82c801 SCWB2 DX Single Chip Solution c:92...
**82C802 SCWB2 PC/AT Single Chip [no datasheet] ?...
**82C802G/GP System/Power Management Controller (cached) c:93...
**82C895 System/Power Management Controller (cached) c:Sep94...
**82C898 System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2 Buffer Devices <Nov94...
**82C822 PCIB (VLB-to-PCI bridge) c:94...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
**Other alias:...
**Notes:...
**Early Chipsets:...
**Later Chipsets:...
*SIS...
**85C211/2/5 286 chipset [no datasheet] ?...
**85C310/320/330 'Rabbit' High performance 386DX chipset <91...
**85C360 ISA 386DX Single Chip chipset [no datasheet] ?...
**85C401/402 ISA 486DX/SX Cache chipset [no datasheet] ?...
**85C406/5/411/420/431 EISA 386/486 Chipset [no datasheet] c91...
**85C460 ISA 386DX/486 Single Chip [no datasheet] ?
**85C461 ISA 386DX/486 Single Chip [no datasheet] ?...
**85C471/407 Green PC ISA-VLB 486 Single Chip <94...
**85C496/497 486-VIP 486 Green PC VESA/ISA/PCI Chipset <95...
**85C501/502/503 Pentium/P54C PCI/ISA Chipset <01/09/95...
**5101/5102/5103 Pentium/P54C PCI/ISA Chipset <04/02/95...
**5120 Pentium PCI/ISA Chipset (Mobile) <01/28/97...
**5501/5502/5503 Pentium/P54C PCI/ISA Chipset <04/02/95
***Info:...
***Configurations:...
***Features:...
**5511/5512/5513 Pentium PCI/ISA <06/14/95...
***Info:...
***Configurations:...
***Features:...
**5571 (Trinity) Pentium PCI/ISA Chipset (75MHz) <12/09/96...
***Info:
[no general section in datasheet]
3. Functional Description
3.1 DRAM Controller
3.1.1 DRAM Type
The SiS5571 can support up to 384MBytes (3 banks) of DRAMs and each
bank could be single or double sided 64 bits FP (Fast Page mode) DRAM,
EDO (Extended Data Output) DRAM, and SDRAM (Synchronous DRAM)
DRAM. Half populated bank(32-bit) is also supported.
The installed DRAM type can be 256K, 512k, 1M, 2M, 4M or 16M bit deep
by n bit wide DRAMs, and both symmetrical and asymmetrical type DRAM
are supported. It is also permissible to mix the DRAMs (FP/EDO/SDRAM)
bank by bank and the corresponding DRAM timing will be switched
automatically according to register settings.
3.1.2 DRAM Configuration
The SiS5571 can support single sided or double sided DRAM modules for
each bank. The basic configurations are shown as the following:
3.1.3 Double-sided DRAM [omitted see datasheet]
3.1.4 Single-sided DRAM [omitted see datasheet]
3.1.5 DRAM Scramble Table [omitted see datasheet]
3.1.6 64-bit mapping table [omitted see datasheet]
3.2 DRAM Performance [omitted see datasheet]
3.3 CPU to DRAM Posted Write FIFOs
There is a built-in CPU to Memory posted write buffer with 8 QWord
deep ( CTMFF). All the write access to DRAM will be buffered. For the
CPU read miss / Line fill cycles, the write- back data from the second
level cache will be buffered first, and right after the data had been
posted write into the FIFO, CPU can performs the read operation by the
memory controller starting to read data from DRAMs. The buffered data
are then written to DRAM whenever no any other read DRAM request
comes. With this concurrent write back policy, many wait states are
eliminated. If there comes a bunch of continuous DRAM write cycles,
some ones will be pending if the CTMFF is full.
3.4 32-bit (Half-Populated) DRAM Access
For the read access, there will be either single or burst read cycle
to access the DRAM which depends on the cacheability of the cycle. If
the current DRAM configuration is half-populated bank, then the
SiS5571 will assert 8 consecutive cycles to access DRAM for the burst
cycle. For the single cycle that only accesses DRAM within a DWord,
the SiS5571 will only issue one cycle to access DRAM. For the single
cycle that accesses one Qword or cross DWord boundary, the SiS5571
will issue two consecutive cycles to access DRAM.
3.5 Arbiter
The arbiter is the interface between the DRAM controller and the host
which can access DRAMs. In addition to pass or translate the
information from outside to DRAM controller, arbiter is also
responsible for which master has higher priority to access DRAMs. The
arbiter treats different DRAM access request as DRAM master, and that
makes there be 5 masters which are trying to access DRAMs by sending
their request to the arbiter. After one of them get the grant from the
arbiter, it owns DRAM bus and begins to do memory data transaction.
The masters are: CPU read request, PCI master, Posted write FIFO write
request, and Refresh request. The order of these masters shown above
also stands for their priority to access memory.
3.6 Refresh cycle
The refresh cycle will occur every 15.6 us. It is timed by a counter
of 14Mhz input. The CAS[7:0]# will be asserted at the same time, and
the RAS[5:0]# are asserted sequentially.
3.7 PCI bridge
SiS5571 is able to operate at both asynchronous and synchronous PCI
clocks. Synchronous mode is provided for those synchronous system to
improve the overall system performance. While in the PCI master write
cycles, post-write is always performed. And function of Write Merge
with CPU-to-DRAM post-write buffer is incorporated to eliminate the
penalty of snooping write-back. On the other hand, prefetch is enabled
for master read cycles by default, and such function could be disabled
optionally. And, Direct-Read from CPU-to-DRAM post-write buffer is
implemented to eliminate the overhead of snooping write-back also. In
addition to Write-Merge and Direct-Read, Snoop-Ahead also hides the
overhead of inquiry cycles for master to main memory cycles. These key
functions, Write-Merge, Direct-Read and Snoop-Ahead, achieve the
purpose of zero wait for PCI burst transfer. The post-write and
prefetch buffers are both 16 Double-Word deep FIFOs.
3.8 Snooping Control [omitted see datasheet]
3.9 AHOLD/BOFF# Process and Arbiter Interface [omitted see datasheet]
3.10 Target Initiated Termination [omitted see datasheet]
3.11 DATA Flow [omitted see datasheet]
3.12 PCI Master Read/Write DRAM Cycle [omitted see datasheet]
***Configurations:...
***Features:...
**5581/5582 (Jessie) Pentium PCI/ISA Chipset (75MHz) <04/15/97...
***Info:...
***Configuration:...
***Features:...
**5591/5592/5595 (David) Pentium PCI A.G.P. Chipset <01/09/98...
***Info:...
***Configurations:...
***Features:...
**5596/5513 (Genesis) Pentium PCI Chipset <03/26/96...
***Info:...
***Configurations:...
***Features:...
**5597/5598 (Jedi) Pentium PCI/ISA Chipset <04/15/97...
***Info:...
***Configurations:...
***Features:...
**530/5595 (Sinbad) Host, PCI, 3D Graphics & Mem. Ctrl.<11/10/98...
***Info:...
***Configurations:...
***Features:
o Supports Intel/AMD/Cyrix/IDT Pentium CPU Host Bus at
66/75/83/95/100 MHz and 2.5/3.3V Bus Interface
− Supports the Pipelined Address of Pentium compatible CPU
− Supports the Linear Address Mode of Cyrix CPU
− 100/100, 95/95, 83/83, 75/75 and 66/66 MHz Synchronous
Host/DRAM clocking configuration
− 100/75, 95/75, 83/66, 66/100 and 66/83 MHz Asynchronous
Host/DRAM clocking configuration
− Supports Host Bus operation for integrated 3D VGA Controller
o Meets PC99 Requirements
o Supports PCI Revision 2.2 Specification
o Integrated Super AGP VGA for Hardware 2D/3D Video/Graphics
Accelerators
− Supports tightly coupled 64 bits 100MHz host interface to VGA
to speed up GUI performance and the video playback frame rate
− Built-in programmable 24-bit true-color RAMDAC up to 230 MHz
pixel clock
− Built-in reference voltage generator and monitor sense circuit
− Supports loadable RAMDAC for gamma correction in high color
and true color modes
− Built-in dual-clock generator
− Supports Multiple Adapters and Multiple Monitors
− Built-in PCI multimedia interface
− Flexible design for shared frame buffer or local frame buffer
architecture
− Shared System Memory Area 2MB, 4MB and 8MB
− Supports SDRAM and SGRAM local frame buffer and memory size up
to 8 MB
− Supports Digital Flat Panel Port for Digital Monitor (LCD Panel)
− Supports DVD H/W Accelerator
o Integrated Second Level ( L2 ) Cache Controller
− Write Back Cache Mode
− Direct Mapped Cache Organization
− Supports Pipelined Burst SRAM
− Supports 256K/512K/1M/2M Bytes Cache Sizes
− Cache Hit Read/Write Cycle of 3-1-1-1
− Cache Back-to-Back Read Cycle of 3-1-1-1-1-1-1-1
− Supports Single Read Allocation for L2 Cache
− Supports Concurrency of CPU to L2 cache and Integrated A.G.P.
VGA master to DRAM accesses
o Integrated DRAM Controller
− Supports up to 3 double sided DIMMs (6 rows memory)
− Supports 8Mbytes to 1.5 GBytes of main memory
− Supports Cacheable DRAM Sizes up to 256 MBytes
− Supports 1M/2M/4M/8M/16M/32M x N for 2-bank or 4-bank SDRAM
− Supports 3.3V DRAM
− Supports Concurrent Write Back
− Supports CAS before RAS Refresh, Self Refresh
− Supports Relocation of System Management Memory
− Programmable CS#, DQM#, SRAS#, SCAS#, RAMWE# and MA Driving
Current
− Option to Disable Local Memory in Non-cacheable Regions
− Entries GART cache to Minimize the Number of Memory Bus Cycles
Required for Accessing Graphical Texture Memory
− Programmable Counters to Ensure Guaranteed Minimum Access Time
for Integrated A.G.P. VGA, CPU, and PCI accesses
− Two Programmable Non-cacheable Regions
− Supports X-1-1-1/X-2-2-2 Burst Write Cycles
− Fully Configurable for the Characteristic of Shadow RAM (640
KBytes to 1 MBytes)
− Shadow RAM in Increments of 16 KBytes Built-in 8 Way
Associative/16
− Supports SDRAM 7/8-1-1-1 Burst Read Cycles
o Provides High Performance PCI Arbiter
− Supports up to 4 PCI Masters
− Supports Rotating Priority Mechanism
- Hidden Arbitration Scheme Minimizes Arbitration Overhead
- Supports Concurrency between CPU to Memory and PCI to PCI
- Supports Concurrency between CPU to 33Mhz PCI Access and 33Mhz
PCI to integrated A.G.P. VGA Access
- Programmable Timers Ensure Guaranteed Minimum Access Time for
PCI Bus Masters, and CPU
o PCI Bus Interface
- Supports 32-bit PCI local bus standard Revision 2.2 compliant
- Integrated write-once subsystem vendor ID configuration register
- Supports zero wait-state memory mapped I/O burst write
- Integrated 2 stages PCI post-write buffer to enhance frame
buffer write performance
- Integrated 256 bits read cache to enhance frame buffer read
performance
- Supports full 16-bit re-locatable VGA I/O address decoding
o Integrated Host-to-PCI Bridge
- Supports Asynchronous PCI Clock
- Translates the CPU Cycles into the PCI Bus Cycles
- Zero Wait State Burst Cycles
- Supports Pipelined Process in CPU-to-PCI Access
- Maximum PCI Burst Transfer from 256 Bytes to 4 Kbytes
- Supports Memory Remapping Function for PCI master accessing
Graphical Window
o Integrated A.G.P. Compliant Target/66Mhz Host-to-PCI Bridge
- Supports Graphic Window Size from 4MBytes to 256MBytes
- Supports Pipelined Process in CPU-to-Integrated 3D A.G.P.
VGA Access
- Supports 8 Way, 16 Entries Page Table Cache for GART to enhance
Integrated A.G.P. VGA Controller Read/Write Performance
- Supports PCI-to-PCI bridge function for memory write from 33Mhz
PCI bus to Integrated A.G.P. VGA
o Integrated Posted Write Buffers and Read Prefetch Buffers to
Increase System Performance
- CPU-to-Memory Posted Write Buffer (CTMFF) with 12QW Deep, Always
Sustains 0 Wait Performance on CPU-to-Memory
- CPU-to-Memory Read Buffer with 4 QW Deep
- CPU-to-PCI Posted Write Buffer with 2 QW Deep
- PCI-to-Memory Posted Write Buffer with 8 QW Deep, Always
Streams 0 Wait Performance on PCI-to/from-Memory Access
- PCI-to-Memory Read Prefetch Buffer with 8 QW Deep
- CPU-to-VGA Posted Write Buffer with 4 QW Deep
o Fast PCI IDE Master/Slave Controller
- Bus Master Programming Interface for Windows 98 Compliant
Controller
- Plug and Play Compatible
- Supports Scatter and Gather
- Supports Dual Mode Operation - Native Mode and Compatibility
Mode
- Supports IDE PIO Timing Mode 0, 1, 2 ,3 and 4
- Supports Multiword DMA Mode 0, 1, 2
- Supports Ultra DMA 33/66
- Two Separate IDE Bus
- Two 16 DW FIFO for PCI Burst Transfers.
o Supports NAND Tree for Ball Connectivity Testing
o 576-Balls BGA Package
o 3.3V Core with mixed 2.5V, 3.3V and 5V I/O CMOS Technology
**540 (Spartan) Super7 2D/3D Ultra-AGP Single C.S.<11/30/99...
***Info:...
***Configurations...
***Features:...
**55x SoC (System-on-chip) <03/14/02...
***Notes:...
***Versions:...
**
**Support chips:
**85C206 Integrated Peripheral Controller [no datasheet] ?...
***Notes:...
**5595 Pentium PCI System I/O <12/24/97...
***Notes:...
***Info:...
***Versions:...
***Features:...
**950 LPC I/O <07/16/99...
***Info:...
***Versions:...
***Features:...
**Other:...
***Video:...
***Various:...
**PII/III/Pro...
***Notes (Unverified Information!):...
***5600 c:Nov98...
***600 ?...
***620 c:Apr99...
***621 ?...
***630/630E/S c:Feb00...
***630ST/ET ?...
***633/633T c:Mar01...
***635/635T c:Mar01...
***640T c:Mar01 ...
**Athlon etc...
***Notes (Unverified Information!):...
***730S/SE c:Dec00...
***733 c:Apr01...
***735/735S c:Apr01...
***740 c:Nov01...
***745 c:Feb02...
***746/DX/FX c:Aug02...
***748 c:Aug03...
***741/741GX ?...
***M741 ? (mobile)...
*Symphony...
**SL82C360 'Haydn' 80386DX/SX chipset [no datasheet] c:Jun91...
***Notes:...
***Configurations:...
**SL82C460 'Haydn II' 80486 chipset [no datasheet] c:Jun91...
***Notes:...
***Configurations:...
**SL82C470 'Mozart' 486/386 EISA chipset c:Dec91...
***Info:...
***Configurations:...
***Features:...
**SL82C490 'Wagner' 486? [no datasheet] ?...
***Notes:...
**SL82C550 'Rossini' Pentium [no datasheet] c:95...
***Notes:...
***Configurations:...
**
**Support Chips:
**SL82C365 Cache Controller (for 386DX/SX) c:91...
***Info:...
***Versions:...
***Features:...
**SL82C465 Cache Controller (for 486/386DX/SX) c:91...
***Info:...
***Versions:...
***Features:...
*TI (Texas Instruments)...
**SN74LS610/2 IBM AT: SN74LS610, SN74LS612 Memory Mappers <84...
***Notes:...
***Info:...
***Versions:...
***Features:...
**TACT82000 3-Chip 286 [no datasheet] c89...
***Notes:...
**TACT82411 Snake Single-Chip AT Controller c90...
***Notes:...
***Info:...
***Configurations:...
***Features:...
**TACT82S411 Snake+ Single-Chip AT Controller [no datasheet] c91...
***Notes:...
**TACT83000 AT 'Tiger' Chip Set (386) c89...
***Info:...
***Configurations:...
***Features:...
**TACT84500 AT Chip Set (486, EISA) [no datasheet, some info] c91...
***Notes:...
**Other:...
*UMC...
**UM82C*** (IBM/INTEL Direct replacement) c87...
**UM82C088 PC/XT Integration Chip <91...
***Info:...
***Configurations:...
***Features:...
**UM82C230 286AT MORTAR Chip Set <91...
***Info:...
***Configurations:...
***Features:...
**UM82C210 386SX/286 AT Chip Set <91...
***Info:...
***Configurations:...
***Features:...
**UM82C3xx Twinstar & UM82C336F/N & UM82C39x [no datasheet] ?...
***Notes:...
**UM82C380 386 HEAT PC/AT Chip Set <91...
***Info:...
***Configurations:...
***Features:...
**UM82C480 386/486 PC Chip Set c91...
***Info:...
***Configurations:...
***Features:...
**UM82C493/491 ??????????????? [no datasheet] ?...
***Notes:...
**UM8498/8496 486 VL Chipset "Super Energy Star Green"[no dsheet]c94...
***Notes:...
***Configurations:...
**UM8881/8886 HB4 PCI Chipset "Super Energy Star Green"[no dsheet]c94...
***Notes:...
***Configurations:...
**UM8890 Pentium chipset [no datasheet] ?...
***Notes:...
***Configurations:...
**
**Support Chips:
**UM82152 Cache Controller (AUStek A38152 clone) <91...
***Info:...
***Versions:...
***Features:...
**UM82C852 Multi I/O For XT <91...
***Info:...
***Versions:...
***Features:...
**UM82C206 Integrated Peripheral Controller <91...
***Info:...
***Versions:...
***Features:...
**UM82c45x Serial/Parallel chips ?...
***Notes:...
**Other chips:...
***Video:...
***Disk:...
***Peripheral:...
***Other:...
*Unresearched:...
**A - D...
***Appian Technology...
***Atmel...
***Biostar...
***Citygate...
***Cyrix...
***Other...
**E - G...
***Evergreen?...
***Other...
**H - I...
***Hint...
***Other...
**J - R...
***Micro Integration...
***Micron...
****Micron Samurai (Dual Pentium II)...
****Micron Samurai DDR (Dual Pentium III)...
****Micron Samurai K7 (Dual Athlon)...
****Micron Mamba (Athlon)...
****Micron Shogun (Athlon)...
****Micron Scimitar (Athlon)...
***Oak...
***Other:...
**S...
***Shasta...
***SARC...
***ServerWorks (Reliance Computer Corporation)...
****Serverset III LE ...
****Serverset III HE [NB6536] ...
****Serverset III WS ...
****Serverset III HESL ...
***Sun Electronics (SUNTAC) ...
***Syslogic...
***Other...
**T - Z...
***Toshiba ...
***UniChip ...
***USA...
***Other...
*VIA
**SL9XXX FlexSet family General information...
**SL9011 System Controller (80286/80386SX/DX, 16/20/25MHz) <Jan90...
***Info:...
***Versions:...
***Features:...
**SL9020 Data Controller <Jan90...
***Info:...
***Versions:...
***Features:...
**SL9025 Address Controller <Jan90...
***Info:...
***Versions:...
***Features:...
**SL9030 Integrated Peripheral Controller <Jan90...
***Info:...
***Versions:...
***Features:...
**SL9090/A Universal PC/AT Clock Chip <oct88...
***Info:...
***Versions:...
***Features:...
**SL9095 Power Management Unit ?...
***Info:...
***Versions:...
***Features:...
**SL9151 80286 Page Interleave Memory Controller (16-25MHz) ?...
***Info:...
***Versions:...
***Features:...
**SL9250 80386SX Page Mode Memory Controller (16/20MHz 8MB) ?...
***Info:...
***Versions:...
***Features:
o Supports 80386SX based AT Designs.
o Up to 20 MHz Performance.
o Enhanced Fast Page Mode DRAM Controller.
o Supports 8 M byte of On-Board Memory.
o Shadow RAM Feature.
o Programmable Wait State Options.
o Can use 256K or 1 Meg DRAMs or a mix.
o Supports 100 ns DRAMs at 16 MHz and 80 us at 20 MHz.
o Selectable Wait State Option for Faster DRAMs.
o Switchable remapping of 640K - 1 M RAM to the Top of the
Address Space.
o Advanced CMOS Technology.
o 100 pin Flatpack.
**SL9251 80386SX Page Interleave Memory Controller <04/13/90...
***Info:...
***Versions:...
***Features:...
**SL9252 80386SX System and Memory Controller <06/12/90...
***Info:...
***Versions:...
***Features:...
**SL9350 80386DX Page Mode Memory Controller (16-25MHz 16MB) ?...
***Info:...
***Versions:...
***Features:...
**SL9351 80386DX Page Interleave Memory Controller (33MHz) ?
***Info:...
***Versions:...
***Features:...
**SL9352 80386DX System and Memory Controller <06/12/90...
**SLXXXX Other chips...
**
**VT82C470 "Jupiter", Chip Set (w/o cache) 386 [no datasheet] ?
**VT82C475 "Jupiter", Chip Set (w/cache) 386 [no datasheet] ?
**VT82C486/2/3 "GMC chipset" [no datasheet, some info] ?...
**VT82C495/480 "Venus" Chip Set [no datasheet] ?
**VT82C495/491 ? EISA Chip Set [no datasheet, some info] <93...
**VT82C496G Pluto, Green PC 80486 PCI/VL/ISA System <05/30/94...
**VT82C530MV 3.3V Pentium chipset [no datasheet, some info]<05/30/94...
**VT82C570M Apollo Master, Green Pentium/P54C <06/22/95...
**VT82C580VP Apollo VP, Pentium/M1/K5 PCI/ISA System <02/15/96...
**VT82C580VPX Apollo VPX, VPX/97, Pentium with 66/75MHz Bus <01/09/97...
**VT82C590 Apollo VP2, VP2/97, Single-Chip Pentium 66MHz <01/10/97...
**VT82C597/AT Apollo VP3, Single-Chip for Pentium with AGP <10/03/97...
**VT82C598MVP Apollo MVP3,Single-Chip 66/75/83/100MHz & AGP <09/22/97...
**VT8501 Apollo MVP4,Single-Chip 66-100MHz & AGP <11/04/98...
**VT82C680 Apollo P6, Pentium-Pro Chip Set <08/30/96...
**Support chips:
**VT82C505 Pentium/486 VL to PCI Bridge <05/30/94...
**VT82C586/A/B PCI Integrated Peripheral Controller <10/13/96...
**VT82C596/A Mobile PCI Integrated Peripheral Controller <11/05/97...
**VT82C686A/B PCI Super-I/O Integrated Peripheral Ctrl. <02/10/98...
**Later P-Pro/II/III/Celeron...
**Later AMD...
**Other...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:
ftp://ami.com/archive/Other_Manuals/!index.txt
http://cs.ecust.edu.cn/snwei/studypc/cmos/008.htm
http://chukaev.ru54.com/bios_en.htm
http://www.matrix-bios.nl/id/mr.html
http://maben.homeip.net/static/s100/IBM/BIOS/the%20BIOS%20companion2.pdf
http://pclinks.xtreemhost.com/chipsets_pentium.htm?ckattempt=1
http://redhill.net.au/
http://www.vogonswiki.com/index.php/386_Motherboards
http://www.vogonswiki.com/index.php/Socket_1-3_Motherboards
http://www.vogonswiki.com/index.php/Socket_4_Motherboards
http://www.vogonswiki.com/index.php/Socket_5_/_7_/_Super-7_Motherboards
http://www.vogonswiki.com/index.php/Socket_8_/_Slot_1_/_Socket_370_Motherboards
http://www.idhw.com/textual/chip/chips_tech/chips_tech.html
http://www.idhw.com/textual/chip/acc/chipname.html
http://www.idhw.com/textual/chip/aldtech/chipname.html
http://www.idhw.com/textual/chip/acerlabs/chipname.html
http://www.idhw.com/textual/chip/amd/chipname.html
http://www.plasma-online.de/english/identify/manufacturer/manufacturer_09.html
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