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***Info:
The CHIPS 82C721 enhanced I/O peripheral controller is a single-chip
solution offering complete I/O capabilities for PC/AT and PC/XT
environments. The 82C721 supports motherboard applications with
configuration via software.
The 82C721 features a floppy disk controller, a digital data
separator, two 16450 compatible UARTs, a bi-directional parallel port,
an IDE interface control logic and a game port chip select.
The floppy disk controller is software compatible with NEC uPD72065B
floppy disk controller. The controller supports up to four drives
directly. The digital data separator is capable of data transfer rates
up to 500kb/sec and requires no external components.
The 82C721 has two UARTs which are compatible with NS16450 UARTs. The
IDE control logic provides a complete IDE interface for embedded hard
disk drives. The bidirectional parallel port maintains complete
compatibility with ISA and PS/2 parallel ports. It can be configured
for either output mode or for bidirectional mode.
The configuration RAM and circuitry support programmable base
addresses for all the registers. Selection of sources of interrupts,
enabling and configuring of on-chip subsystems and the control of the
configuration process itself are also handled by this RAM and its
associated circuitry. The game port chip select provides a predefined
I/O address decode for games and joy stick applications.
The 82C721, designed for motherboard applications, is provided with
several power management features, which are controllable through
hardware or software. In hardware, the device can be completely
powered down through a power-down pin. In this mode, all inputs are
disabled, all outputs are inactive, and the contents of all registers
are preserved (as long as the power supply is maintained). In
software, the device allows each port to be powered down
independently.
The 82C721 features 24mA drivers for output buffers, including the
host data bus and the parallel port data bus. The floppy output
drivers are capable of sinking 48mA. The host interface is PC
compatible and can be connected directly to the ISA bus.
***Versions:...
***Features:...
**82C735 I/O Peripheral Controller With Printgine c:Jul93...
**82C835 Single CHIP 386sx AT Cache Controller c:Apr91...
**F87000 Multi-Mode Peripheral Chip 11/23/93...
**Other:...
**Disk:...
**Video:...
*Contaq . . . . . [no datasheets, some info]...
**82C591/2 3/486 <Mar92...
**82C593 3/486 [no datasheet] <May92...
**82C596/A 3/486 Writeback Cache [no datasheet] <11/11/92...
**?????? 486 EISA chipset [no datasheet] <Feb93...
**82C599 PCI-VLB Bridge [no datasheet, some info] ?...
**82C693 PCI-ISA Bridge [no datasheet] ?...
*Efar Microsystems [no datasheets, some info]...
**EFAR-8290WB 386/486 Writeback PC/AT Chipset [no datasheet] ?...
**82EC798 386/486 Writeback PC/AT Single Chip [no datasheet] ?
**Other:...
*ETEQ...
**?????? "Cougar/Bobcat" 386DX/486DX chipset [no datasheet] cNov91...
**?????? "Bengal" 386DX/486 (WriteBack) [no datasheet] cNov91...
**ET2000 386/486 WB Chipset ?...
**ET6000 "Cheetah" 486DX/SX Non-Cache System <Apr92...
**ET9000 "Jaguar" 486 Write Back Cache AT Single Chip <Jun92...
**ET9800/391 "Firefox" 386SX Write Back chipset [no datasheet] ?...
**82C390SX "Panda" S.C. 386SX Direct Mapped Cache [no d.sheet]cFeb92...
**66x8 VIA clones [no datasheet] ?...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel
**IBM PC/XT/AT Chip Sets...
**82230/82231 High Integration AT-Compatible Chip Set(ZyMOS) c:Aug88...
**82310 Micro Channel Compatible Peripheral Chip Set 04/21/88...
**82311 High Integration MCA Compatible Perip. Chip Set 11/14/88...
**82320 MCA compatible Chipset [no datasheet] 04/10/89...
**82340DX Chip Set (VLSI) (82346/82345/82355) 01/08/90...
**82340SX Chip Set (VLSI) (82343/82344) 01/25/89...
**82350 EISA Chip Set 07/10/89...
**82350DT EISA Chip Set 04/22/91...
**82420TX/ZX PCIset (for 486) TX (Saturn), ZX (Saturn II) c:Nov92...
**82420EX PCIset (for 486) EX (Aries) (82425EX/82426EX) <Dec94...
**82430LX PCIset (Pentium) LX (Mercury) (82433LX/82434LX) 03/22/93...
**82430NX PCIset (Pentium) NX (Neptune) (82433NX/82434NX) Mar94...
**82430FX PCIset (Pentium) FX (Triton I) (82437FX/82438FX)01/31/95...
**82430MX PCIset (Pentium) MX (Mobile Triton)(82437/438MX)11/01/95...
**82430HX PCIset (Pentium) HX (Triton II) (82439HX) 02/12/96...
**82430VX PCIset (Pentium) VX (Triton II) (82437VX/82438) 02/12/96...
**82430TX PCIset (Pentium) TX (Triton II) (82439TX) 02/17/97...
**82450KX/GX PCIset (Pentium Pro) KX/GX (Mars/Orion) 11/01/95...
**
**Support Chips:
**82091AA Advanced Interface Peripheral (AIP) c93...
**8289 Bus Arbiter (808x) c79...
**82289 Bus Arbiter for iAPX 286 Processor Family c83...
**82258 Advanced Direct Memory Access Coprocessor(ADMA) 01/01/84...
**82335 High-Integration Interface Device For 386SX c:Nov88...
**82360SL I/O Subsystem 10/05/90...
**82370 Integrated System Peripheral (for 82376) c:Oct88...
**82371FB/SB PCI ISA IDE Xcelerator 82371FB/82371SB (PIIX/3) 01/31/95...
**82371MX Mobile PCI I/O IDE Xcelerator (MPIIX) 11/01/95...
**82371AB PCI-TO-ISA / IDE Xcelerator 82371AB (PIIX4) 02/17/97...
**82374/82375 PCI-EISA Bridge (82374EB/82375EB, 374SB/375SB) c:Mar93...
**82378 System I/O (SIO) (82378IB and 82378ZB) c:Mar93...
**82379AB System I/O-APIC (SIO.A) <Dec94...
**82380 32-bit DMA Controller w/ Integrated Peripherals 02/01/87...
**82380FB/AB PCIset: 82380FB Mobile PCI-to-PCI Bridge(MPCI2) 02/17/97...
**82384 Clock Generator and Reset Interface c86...
**82385 32-bit Cache Controller for 80386 09/29/87...
**82385SX 32-bit Cache Controller for 80386SX 01/25/89...
**82395DX High Performance Smart Cache 06/18/90...
**82395SX Smart Cache 12/17/90...
**82396SX Smart Cache 12/17/90...
**82485 Turbo Cache (and 485Turbocache) c90...
**82489DX Advanced Programmable Interrupt Controller 10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
***Versions:
UM82152
***Features:...
**UM82C852 Multi I/O For XT <91...
**UM82C206 Integrated Peripheral Controller <91...
**UM82c45x Serial/Parallel chips ?...
**Other chips:...
*Unresearched:...
**A - D...
**E - G...
**H - I...
**J - R...
**S...
**T - Z...
*VIA
**SL9XXX FlexSet family General information...
**SL9011 System Controller (80286/80386SX/DX, 16/20/25MHz) <Jan90...
**SL9020 Data Controller <Jan90...
**SL9025 Address Controller <Jan90...
**SL9030 Integrated Peripheral Controller <Jan90...
**SL9090/A Universal PC/AT Clock Chip <oct88...
**SL9095 Power Management Unit ?...
**SL9151 80286 Page Interleave Memory Controller (16-25MHz) ?...
**SL9250 80386SX Page Mode Memory Controller (16/20MHz 8MB) ?...
**SL9251 80386SX Page Interleave Memory Controller <04/13/90...
**SL9252 80386SX System and Memory Controller <06/12/90...
**SL9350 80386DX Page Mode Memory Controller (16-25MHz 16MB) ?...
**SL9351 80386DX Page Interleave Memory Controller (33MHz) ?
***Info:...
***Versions:...
***Features:...
**SL9352 80386DX System and Memory Controller <06/12/90...
**SLXXXX Other chips...
**
**VT82C470 "Jupiter", Chip Set (w/o cache) 386 [no datasheet] ?
**VT82C475 "Jupiter", Chip Set (w/cache) 386 [no datasheet] ?
**VT82C486/2/3 "GMC chipset" [no datasheet, some info] ?...
**VT82C495/480 "Venus" Chip Set [no datasheet] ?
**VT82C495/491 ? EISA Chip Set [no datasheet, some info] <93...
**VT82C496G Pluto, Green PC 80486 PCI/VL/ISA System <05/30/94...
**VT82C530MV 3.3V Pentium chipset [no datasheet, some info]<05/30/94...
**VT82C570M Apollo Master, Green Pentium/P54C <06/22/95...
**VT82C580VP Apollo VP, Pentium/M1/K5 PCI/ISA System <02/15/96...
**VT82C580VPX Apollo VPX, VPX/97, Pentium with 66/75MHz Bus <01/09/97...
**VT82C590 Apollo VP2, VP2/97, Single-Chip Pentium 66MHz <01/10/97...
**VT82C597/AT Apollo VP3, Single-Chip for Pentium with AGP <10/03/97...
***Info:
The Apollo-VP3 is a high performance, cost-effective and energy
efficient chip set for the implementation of AGP / PCI / ISA desktop
and notebook personal computer systems based on 64-bit Socket-7 (Intel
Pentium and Pentium MMX; AMD K5 / 5k86 and K6 / 6k86; and Cyrix / IBM
6x86 / M2) super-scalar processors.
The Apollo-VP3 chip set consists of the VT82C597 system controller
(472 pin BGA) and the VT82C586B PCI to ISA bridge (208 pin PQFP). The
VT82C597 system controller provides superior performance between the
CPU, optional synchronous cache, DRAM, AGP bus, and PCI bus with
pipelined, burst, and concurrent operation. For pipelined burst
synchronous SRAMs, 3-1-1-1-1-1-1-1 timing can be achieved for both
read and write transactions at 66 MHz. Four cache lines (16
quadwords) of CPU/cache to DRAM write buffers with concurrent
write-back capability are included on chip to speed up cache read and
write miss cycles.
The VT82C597 supports six banks of DRAMs up to 1GB. The DRAM
controller supports standard Fast Page Mode (FPM) DRAM, EDO-DRAM,
Synchronous DRAM (SDRAM), and SDRAM-II with Double Data Rate (DDR) in
a flexible mix / match manner. The Synchronous DRAM interface allows
zero wait state bursting between the DRAM and the data buffers at
66Mhz. The six banks of DRAM can be composed of an arbitrary mixture
of 1M / 2M / 4M / 8M / 16MxN DRAMs. The DRAM controller also supports
optional ECC (single-bit error correction and multi-bit detection) or
EC (error checking) capability separately selectable on a bank-by-bank
basis.
The VT82C597 also supports full AGP v1.0 capability for maximum bus
utilization including 2x mode transfers, SBA (SideBand Addressing),
Flush/Fence commands, and pipelined grants. An eight level request
queue plus a four level post-write request queue with thirty-two and
sixteen quadwords of read and write data FIFO's respectively are
included for deep pipelined and split AGP transactions. A
single-level GART TLB with 16 full associative entries and flexible
CPU/AGP/PCI remapping control is also provided for operation under
protected mode operating environments.
The VT82C597 supports two 32-bit 3.3 / 5V system buses (one AGP and
one PCI) with 64-bit to 32-bit data conversion. The 82C597 also
contains a built-in bus-to-bus bridge to allow simultaneous concurrent
operations on each bus. Five levels (doublewords) of post write
buffers are included to allow for concurrent CPU and PCI operation.
Consecutive CPU addresses are converted into burst PCI cycles with
byte merging capability for optimal CPU to PCI throughput. For PCI
master operation, forty-eight levels (doublewords) of post write
buffers and sixteen levels (doublewords) of prefetch buffers are
included for concurrent PCI bus and DRAM/cache accesses. The chipset
also supports enhanced PCI bus commands such as Memory-Read-Line,
Memory-Read-Multiple and Memory-Write-Invalid commands to minimize
snoop overhead. In addition, the chipset supports advanced features
such as snoop ahead, snoop filtering, L1 write-back forward to PCI
master and L1 write-back merged with PCI post write buffers to
minimize PCI master read latency and DRAM utilization. The VT82C586B
PCI to ISA bridge supports four levels (doublewords) of line buffers,
type F DMA transfers and delay transaction to allow efficient PCI bus
utilization and (PC I-2.1 compliant). The VT82C586B also includes an
integrated keyboard controller with PS2 mouse support, integrated
DS12885 style real time clock with extended 256 byte CMOS RAM,
integrated master mode enhanced IDE controller with full scatter and
gather capability and extension to UltraDMA-33 / ATA-33 for 33MB/sec
transfer rate, integrated USB interface with root hub and two function
ports with built-in physical layer transceivers, Distributed DMA
support, and OnNow / ACPI compliant advanced configuration and power
management interface. A complete main board can be implemented with
only six TTLs.
The Apollo VP3 chipset is ideal for high performance, high quality,
high energy efficient and high integration desktop and notebook AGP /
PCI / ISA computer systems.
***Configurations:...
***Features:...
**VT82C598MVP Apollo MVP3,Single-Chip 66/75/83/100MHz & AGP <09/22/97...
**VT8501 Apollo MVP4,Single-Chip 66-100MHz & AGP <11/04/98...
**VT82C680 Apollo P6, Pentium-Pro Chip Set <08/30/96...
**Support chips:
**VT82C505 Pentium/486 VL to PCI Bridge <05/30/94...
**VT82C586/A/B PCI Integrated Peripheral Controller <10/13/96...
**VT82C596/A Mobile PCI Integrated Peripheral Controller <11/05/97...
**VT82C686A/B PCI Super-I/O Integrated Peripheral Ctrl. <02/10/98...
**Later P-Pro/II/III/Celeron...
**Later AMD...
**Other...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...
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