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**82395SX Smart Cache 12/17/90
***Notes:...
**82396SX Smart Cache 12/17/90...
**82485 Turbo Cache (and 485Turbocache) c90...
**82489DX Advanced Programmable Interrupt Controller 10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
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*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
**5571 (Trinity) Pentium PCI/ISA Chipset (75MHz) <12/09/96
***Info:...
***Configurations:...
***Features:
o Supports Intel Pentium CPU and other compatible CPU at
75/66/60/50MHz (external clock speed)
o Supports the Pipelined Address Mode of Pentium CPU
o Supports the Full 64-bit Pentium Processor data Bus
o Supports 32-bit PCI Interface
o Integrated Second Level (L2) Cache Controller
- Write Through and Write Back Cache Modes
- 8 bits or 7 bits Tag with Direct Mapped Cache Organization
- Integrated 16K bits Dirty Ram
- Supports Pipelined Burst SRAM
- Supports 256 KBytes to 512 MBytes Cache Sizes
- Cache Read/Write Cycle of 3-1-1-1-1-1-1-1 at 66 MHz
o Integrated DRAM Controller
- Supports 3 Banks of FP/EDO SIMMs, or 2 Banks of SDRAM DIMMs
- Supports 2Mbytes to 384Mbytes of main memory
- Supports 256K/512K/1M/2M/4M/16M x N FP/EDO/SDRAM DRAM
- Supports 3V or 5V DRAM.
- Supports Symmetrical and Asymmetrical DRAM.
- Supports 32 bits/64 bits mixed mode configuration
- Supports Concurrent Write Back for FP/EDO DRAM
- Supports Mixed DRAM (FP/EDO/SDRAM) Technology
- Supports CAS before RAS Refresh
- Supports Relocation of System Management Memory
- Programmable CAS# ,RAS#, RAMW# and MA Driving Current
- Fully Configurable for the Characteristic of Shadow RAM (640
KBytes to 1 MBytes)
- Supports FP DRAM 5-3-3-3(-3-3-3-3) Burst Read Cycles
- Supports EDO DRAM 4/5-2-2-2(-2-2-2-2) Burst Read Cycles
- Supports SDRAM 6/7-1-1-1(-2-1-1-1) Burst Read Cycles
- Supports X-1-1-1/X-2-2-2/X-3-3-3 Burst Write Cycles
- Supports 8 Qword Deep Buffer for Read/Write Reordering, Dword
Merging and 3/2-1-1-1 Post write Cycles
- Two Programmable Non-Cacheable Regions
- Option to Disable Local Memory in Non-Cacheable Regions
- Shadow RAM in Increments of 16 KBytes
o Integrated PMU Controller
- Supports SMM Mode of CPU
- Supports CPU Stop Clock
- Supports Break Switch
- Supports Modem Ring Wakeup
- Supports Automatic Power Supply Control
o Provides High Performance PCI Arbiter.
- Supports 3 internal masters and 5 external PCI Masters
- Supports Rotating Priority Mechanism
- Hidden Arbitration Scheme Minimizes Arbitration Overhead.
- Supports Concurrency between CPU to Memory and PCI to PCI.
o Integrated Host-to-PCI Bridge
- Supports Asynchronous/Synchronous PCI Clock
- Translates the CPU Cycles into the PCI Bus Cycles
- Provides CPU-to-PCI Read Assembly and Write Disassembly
Mechanism
- Translates Sequential CPU-to-PCI Memory Write Cycles into PCI
Burst Cycles
- Zero Wait State Burst Cycles
- Supports 8 DW Deep Buffer for CPU-to-PCI Posted Write Cycles
- Supports Pipelined Process in CPU-to-PCI Access
- Supports Advance Snooping for PCI Master Bursting
- Maximum PCI Burst Transfer from 256 Bytes to 4 Kbytes
- Fast back-to-back
o Integrated Posted Write Buffers and Read Prefetch Buffers to
Increase System Performance
- CPU-to-Memory Posted Write Buffer (CTMFF) with 8 QW Deep, Always
Sustains 0 Wait Performance on CPU-to-Memory.
- CPU-to-PCI Posted Write Buffer(CTPFF) with 8 DW Deep
- PCI-to-Memory Posted Write Buffer(PTHFF) with 8 QW Deep, Always
Streams 0 Wait Performance on PCI-to/from-Memory Access
- PCI-to-Memory Read Prefetch Buffer(CTPFF) with 8 QW Deep
o Built-in one 32-bit General Purpose Register
o Integrated PCI-to-ISA Bridge
- Translates PCI Bus Cycles into ISA Bus Cycles
- Translates ISA Master or DMA Cycles into PCI Bus Cycles
- Provides a Dword Post Buffer for PCI to ISA Memory cycles
- Two 32 bit Prefetch/Post Buffers Enhance the DMA and ISA Master
Performance
- Fully Compliant to PCI 2.1
o Enhanced DMA Functions
- 8-, 16- bit DMA Data Transfer
- ISA compatible, and Fast Type F DMA Cycles
- Two 8237A Compatible DMA Controllers with Seven Independent
Programmable Channels
- Provides the Readability of the two 8237 Associated Registers
o Built-in Two 8259A Interrupt Controllers
- 14 Independently Programmable Channels for Level- or Edge-
triggered Interrupts
- Provides the Readability of the two 8259A Associated Registers
o Three Programmable 16-bit Counters compatible with 8254
- System Timer Interrupt
- Generates Refresh Request
- Speaker Tone Output
- Provides the Readability of the 8254 Associated Registers
o Built-in Keyboard Controller
- Hardwired Logic Provides Instant Response
- Supports PS/2 Mouse
- Support Hot Key "Sleep" Function
o Built-in Real Time Clock(RTC) with 256B CMOS SRAM
o Fast PCI IDE Master/Slave Controller
- Fully Compatible with PCI Local Bus Specification V2.1
- Supports PCI Bus Mastering
- Plug and Play Compatible
- Supports Scatter and Gather
- Supports Dual Mode Operation - Native Mode and
Compatibility Mode
- Supports IDE PIO Timing Mode 0, 1, 2 of ANSI ATA Specification
- Supports Mode 3 and Mode 4 Timing Proposal on Enhanced IDE
Specification
- Supports Multiword DMA Mode 0, 1, 2
- Separate IDE Bus
- Two 8x32-bit FIFO for PCI Burst Read/Write Transfers.
o Universal Serial Bus Controller
- Host/Hub Controller
- Two USB ports
o On-Board Plug and Play Support
- One Steerable DMA Channel
- One Steerable Interrupt
- One Programmable Chip Select
o Supports the Reroutibility of the four PCI Interrupts
o Supports Flash ROM
o 480-Pin BGA Package
o 0.5 μm CMOS Technology
**5581/5582 (Jessie) Pentium PCI/ISA Chipset (75MHz) <04/15/97...
**5591/5592/5595 (David) Pentium PCI A.G.P. Chipset <01/09/98...
**5596/5513 (Genesis) Pentium PCI Chipset <03/26/96...
**5597/5598 (Jedi) Pentium PCI/ISA Chipset <04/15/97...
**530/5595 (Sinbad) Host, PCI, 3D Graphics & Mem. Ctrl.<11/10/98...
**540 (Spartan) Super7 2D/3D Ultra-AGP Single C.S.<11/30/99...
**55x SoC (System-on-chip) <03/14/02...
**
**Support chips:
**85C206 Integrated Peripheral Controller [no datasheet] ?...
**5595 Pentium PCI System I/O <12/24/97...
**950 LPC I/O <07/16/99...
**Other:...
**PII/III/Pro
***Notes (Unverified Information!):...
***5600 c:Nov98...
***600 ?...
***620 c:Apr99...
***621 ?...
***630/630E/S c:Feb00...
***630ST/ET ?...
***633/633T c:Mar01...
***635/635T c:Mar01...
***640T c:Mar01 ...
**Athlon etc...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
**W83977ATF WINBOND I/O (Multi I/O) <98
***Info:
GENERAL DESCRIPTION
The W83977ATF is an evolving product from Winbond's most popular I/O
chip W83877F --- which integrates the disk drive adapter, serial port
(UART), IrDA 1.0 SIR, parallel port, configurable plug-and-play
registers for the whole chip --- plus additional powerful features:
ACPI, 8042 keyboard controller with PS/2 mouse support, 23 general
purpose I/O ports, full 16-bit address decoding, OnNow keyboard
wake-up, OnNow mouse wake-up, and OnNow CIR wake-up. In addition, the
W83977ATF provides IR functions: IrDA 1.1 (MIR for 1.152M bps or FIR
for 4M bps) and TV remote IR (Consumer IR, supporting NEC, RC-5,
extended RC-5, and RECS-80 protocols).
The disk drive adapter functions of W83977ATF include a floppy disk
drive controller compatible with the industry standard 82077/ 765,
data separator, write pre-compensation circuit, decode logic, data
rate selection, clock generator, drive interface control logic, and
interrupt and DMA logic. The wide range of functions integrated onto
the W83977ATF greatly reduces the number of components required for
interfacing with floppy disk drives. The W83977ATF supports four 360K,
720K, 1.2M, 1.44M, or 2.88M disk drives and data transfer rates of 250
Kb/s, 300 Kb/s, 500 Kb/s,1 Mb/s, and 2 Mb/s.
The W83977ATF provides two high-speed serial communication ports
(UARTs), one of which supports serial Infrared communication. Each
UART includes a 16-byte send/receive FIFO, a programmable baud rate
generator, complete modem control capability, and a processor
interrupt system. Both UARTs provide legacy speed with baud rate up to
115.2k bps and also advanced speed with baud rates of 230k, 460k, or
921k bps which support higher speed modems. The W83977ATF provides
independent 3rd UART(32-byte FIFO) dedicated for the IR function.
The W83977ATF supports one PC-compatible printer port (SPP),
Bi-directional Printer port (BPP) and also Enhanced Parallel Port
(EPP) and Extended Capabilities Port (ECP). Through the printer port
interface pins, also available are: Extension FDD Mode and Extension
2FDD Mode allowing one or two external floppy disk drives to be
connected.
The configuration registers support mode selection, function
enable/disable, and power down function selection. Furthermore, the
configurable PnP features are compatible with the plug-and-play
feature demand of Windows 95TM, which makes system resource allocation
more efficient than ever.
The W83977ATF provides functions that comply with ACPI (Advanced
Configuration and Power Interface), which includes support of legacy
and ACPI power management through SMI or SCI function pins. The
W83977ATF also has auto power management to reduce power consumption.
The keyboard controller is based on 8042 compatible instruction set
with a 2K Byte programmable ROM and a 256-Byte RAM bank. Keyboard BIOS
firmware is available with optional AMIKEY-2, Phoenix MultiKey/42, or
customer code.
The W83977ATF provides a set of flexible I/O control functions to the
system designer through a set of General Purpose I/O ports. These GPIO
ports may serve as simple I/O or may be individually configured to
provide a predefined alternate function.
The W83977ATF is made to fully comply with Microsoft PC97 Hardware
Design Guide. IRQs, DMAs, and I/O space resource are flexible to
adjust to meet ISA PnP requirement. Moreover, W83977ATF is made to
meet the specification of PC97's requirement in the power management:
ACPI and DPM (Device Power Management).
Another benifit is that W83977ATF has the same pin assignment as
W83977AF, W83977F, W83977TF. This makes the design very flexible.
***Versions:...
***Features:...
**
**Disk Controller:
**W83759/A/F/AF Advanced VL-IDE Disk Controller <96...
**W83769 Local Bus IDE Solution <94...
**
**UARTS:
**W86C250A UART (equivalent of INS8C250A) [no datasheet]
**W86C450/P Universal Asynchronous Receiver/Transmitter <Jul89...
**W86C451 I/O controller for IBM PC/AT/XT <Jul89...
**W86C452 I/O controller for IBM PC/AT Jul89...
**W86C456 I/O controller [no datasheet] ?
**W860551/P UART with FIFO and Printer Port Controller <94...
**
**Other:...
*ZyMOS...
*General Sources:...
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