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**82489DX Advanced Programmable Interrupt Controller 10/12/92
***Notes:...
***Info:...
***Versions:...
***Features:...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
**82C556M/7M/8E Viper-N+ Viper Notebook Chipset c:96
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82C566/7/8 Viper-Max Chipset Scalable MultiMedia PC Solution ?...
**82C571/572 486/Pentium c:93...
**82C576/7/8 Viper Xpress [no datasheet] ?...
**82C576/8/9 Viper XPress+ [no datasheet, some info] <01/16/97...
**82C596/597 PTMAWB Pentium Adaptive Write-back (Cobra) c:93...
**82C650/1/2 Discovery (Pentium Pro) [no datasheet] ?...
**82C681/2/6/7 386/486WB EISA c:92...
**82C683 386/486AWB EISA [no datasheet] ?...
**82C693/6/7 Pentium uP Write Back Cache EISA c:93...
**82C700 FireStar c:97...
**82C701 FireStar Plus c:97...
**82C750 Vendetta [no datasheet] ?...
**82c801 SCWB2 DX Single Chip Solution c:92...
**82C802 SCWB2 PC/AT Single Chip [no datasheet] ?...
**82C802G/GP System/Power Management Controller (cached) c:93...
**82C895 System/Power Management Controller (cached) c:Sep94...
**82C898 System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2 Buffer Devices <Nov94...
**82C822 PCIB (VLB-to-PCI bridge) c:94...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
**SL82C360 'Haydn' 80386DX/SX chipset [no datasheet] c:Jun91
***Notes:
from:
http://www.cbronline.com/news/symphony_introduces_the_haydn_family
"Santa Clara, California-based Symphony Laboratories Inc has unvieled
a family of highly integrated core logic chip sets for all forms of
AT-alike personal computers: the Haydn family comprises the SL82C460
set for 80486 systems and the SL82C360 set for 80386 machines; each
set includes two devices, a system controller and a bus controller and
an optional cache controller chip can be added if cache capability is
required; the parts are in volume production and a complete
motherboard can be created with as few as eight active components plus
memory; all operate at 50MHz and beyond and the sets are supported by
all major BIOS vendors; the sets cost from $50 to $100 apiece in
quantities of 100-up."
***Configurations:...
**SL82C460 'Haydn II' 80486 chipset [no datasheet] c:Jun91...
**SL82C470 'Mozart' 486/386 EISA chipset c:Dec91...
**SL82C490 'Wagner' 486? [no datasheet] ?...
**SL82C550 'Rossini' Pentium [no datasheet] c:95...
**
**Support Chips:
**SL82C365 Cache Controller (for 386DX/SX) c:91...
**SL82C465 Cache Controller (for 486/386DX/SX) c:91...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
**WD8110 System controller for 80386DX/486 <11/30/93
***Notes:...
***Info:...
***Configurations:...
***Features:
o Interfaces with 80486SX, 80486SXLP, 80486DX, 80386SX and 80386DX
CPU's
o Operates at up to 33 MHz at 3.3 volts or 5 volts with the
80486SX/DX
o Operates at up to 33 MHz with the 80386SX/DX
o Supports single and double clock 80486SX/DX and Intel SL Enhanced
processors.
DRAM control:
o Page Mode word interleaved, DRAM controller with support for 80486
burst mode.
o Supports 3-2-2-2 clock sequence, 9 CLKs with 16-byte line fill for
a page hit DRAM read cycle at 33 MHz.
o Optional 3-1-1-1 clock sequence, 6 CLKs with 16-byte line fill for
static column mode DRAMs at CPU speeds of 16 MHz and 20 MHz
o Zero Wait State writes at 16 MHz and 20 MHz to DRAMS for
80486SX/DX
o One Wait State writes to DRAMs for 80386SX/DX
o One Wait State reads from DRAMs for Page Hit access for 80386SX/DX
o Supports memory in five DRAM banks for a maximum of 256 Mbytes,
using 256Kbit, 1 Mbit, 4 Mbit and 16 Mbit DRAMs and special DRAMs
such as 512K by 9, 1M by 18 and 2M by 9.
o Supports major DRAM standards, including Asymmetrical DRAMs Static
Column DRAMs and 88-pin DRAM cards.
o Self-adjusting output drivers minimize output rise/fall time
variations and reduce EMI and ground noise.
o DRAM address multiplexer capable of driving 450 pF with adjustable
strength drivers.
o Features CAS before RAS refresh and slow refresh for low power.
o Supports slow refresh and self refresh DRAMs at 120 us.
o I/O mapping for board testability
o 32-bit direct interface with internal parity generation and
checking with no DRAM data buffers required.
Power Management:
o Low power 0.9 micron CMOS technology
o Provides power control with suspend and resume mode operations.
o 3 volt suspend to hard disk and Hibernation.
o Sleep Mode provides:
- Stop clock for static CPU for power saving.
- Processor power down.
o Provides automatic processor clock switching for 80386.
o Automatic CPU speedup (AutoFast).
- Clock Scaling
- Clock Throttling
o Supports multiple CPU speeds.
o Supports System Management Interrupt (SMI) for efficient power
management.
o Provides peripheral and I/O power control with trapping on I/O
address ranges for SMI operations.
o Supports a fully programmable 16-bit decode.
o Provides System Activity Monitor (SAM) for power management.
o Stop DMA clock.
o 3.3V low voltage operation with on-chip translators for 5 volt AT
bus
(split rail operation).
o 3 volt and 5 volt mixed mode.
Chip Set Features:
o High speed DMA.
o Three fully programmable chip selects with PMC timers.
o Built in Immunizer for virus protection.
o Connects directly to the AT Data Bus SD(15:00).
o Supports a Video Local Bus Interface (VLBI) for a 32-bit Video
Graphic Array (VGA) interface.
o Bank switched BIOS ROM up to 512 KB.
**
**Support Chips:
**WD76C20x Floppy, RTC, IDE and Support Logic Device <11/25/91...
**WD76C30x Perip. Ctrl, Interrupt Multiplex, and Clock Gen <11/18/91...
**WD7615 Desktop Buffer Manager <04/15/92...
**WD7625 Desktop Buffer Manager <10/01/92...
**WD8120LV Super I/O [no datasheet] ?
**Other Chips:...
*Winbond...
*ZyMOS...
*General Sources:...
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