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**M1511/12/13    Aladdin II (Pentium) [no datasheet, some info] >Apr95
***Notes:...
***Configurations:...
**M1521/23       Aladdin III       50-66MHz                     <Nov96...
**M1531/33/43    Aladdin IV & IV+  50-83.3MHz                <05/28/97...
**M1541/42/33/43 Aladdin V & V+    50-100MHz                         ?...
**M1561/43/35D   Aladdin 7 ArtX    [no datasheet, some info]  11/08/99...
**M6117          386SX Single Chip PC                              <97...
**
**Support Chips:
**M1535/D        South Bridge                                        ?...
**
**May not exist:...
**Later Chipsets:...
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*AMD . . . . . . . [no datasheets, some info]...
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**82396SX     Smart Cache                                     12/17/90
***Notes:...
***Info:...
***Versions:
82396SX  20 MHz, integrates 16KB cache

***Features:...
**82485       Turbo Cache (and 485Turbocache)                      c90
***Notes:...
***Info:...
***Versions:...
***Features:...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
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**SL82C465    Cache Controller (for 486/386DX/SX)                 c:91
***Info:...
***Versions:...
***Features:
o   Integrated direct mapped cache controller
o   Supports 486/386DX/386SX CPU
o   Supports both 1X and 2X CPU clock
o   Supports 486DX/SX/DX2/SLC up to 50 MHz
o   Supports 386DX/SX/SXLV up to 40 MHz
o   16KB to 4MB cache size
o   Line size from 1 to 4 doublewords
o   VL-Bus Master Device support
o   2-1-1-1 burst mode cache fill
o   Data streaming in external and internal cache
o   SRAM banks interleaving capability
o   Built-in tag comparator
o   Posted write buffer control
o   Cache invalidation support
o   Non-cacheable region support
o   387SX/387/3167/4167 interface
o   Arbitration between reset and HOLD
o   CMOS 100-pin RQFP package

*TI (Texas Instruments)...
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*Unresearched:...
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