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**82489DX       Advanced Programmable Interrupt Controller    10/12/92
***Notes:...
***Info:
1.0 INTRODUCTION

The  82489DX  Advanced   Programmable  Interrupt  Controller  provides
multiprocessor interrupt management, providing both static and dynamic
symmetrical interrupt distribution across all processors.

The main  function of the  82489DX is to provide  interrupt management
across all  processors. This  dynamic interrupt  distribution includes
routing of the interrupt to the lowest-priority processor. The 82489DX
works in  systems with multiple  I/O subsystems, where  each subsystem
can  have  its  own  set  of  interrupts.   This  chip  also  provides
inter-processor interrupts,  allowing any  processor to  interrupt any
processor or set  of processor. Each 82489DX I/O  init interrupt input
pin is individually  programmable by software as either  edge or level
triggered.  The interrupt vector and interrupt steering information an
be specified  per pin.  A  32-bit wide timer  is provided that  can be
programmed to interrupt the local processor.  the timer can be used as
a counter to provide a time base to software running on the processor,
or to generate  time slice interrupts locally to  that processor.  the
82489DX   provides   32-bit   software    access   to   its   internal
registers. Since no  82489DX register read have any  side effects, the
82489DX registers  can be aliased  to a  user read-only page  for fast
user access (e.g., performance monitoring timers).

The 82489DX  supports a generalized naming/addressing  scheme that can
be tailored by  software to fit a variety of  system architectures and
usage  models.   It  also  supports 8259A  compatibility  by  becoming
virtually  transparent with  regard to  an externally  connected 8259A
style controller, making the 8259A visible to software.

***Versions:...
***Features:...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
**82C556M/7M/8E  Viper-N+ Viper Notebook Chipset                  c:96
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82C566/7/8     Viper-Max Chipset Scalable MultiMedia PC Solution   ?...
**82C571/572     486/Pentium                                      c:93...
**82C576/7/8     Viper Xpress  [no datasheet]                        ?...
**82C576/8/9     Viper XPress+ [no datasheet, some info]     <01/16/97...
**82C596/597     PTMAWB Pentium Adaptive Write-back (Cobra)       c:93...
**82C650/1/2     Discovery (Pentium Pro) [no datasheet]              ?...
**82C681/2/6/7   386/486WB EISA                                   c:92...
**82C683         386/486AWB EISA [no datasheet]                      ?...
**82C693/6/7     Pentium uP Write Back Cache EISA                 c:93...
**82C700         FireStar                                         c:97...
**82C701         FireStar Plus                                    c:97...
**82C750         Vendetta      [no datasheet]                        ?...
**82c801         SCWB2 DX Single Chip Solution                    c:92...
**82C802         SCWB2 PC/AT Single Chip [no datasheet]              ?...
**82C802G/GP     System/Power Management Controller (cached)      c:93...
**82C895         System/Power Management Controller (cached)   c:Sep94...
**82C898         System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2       Buffer Devices                                 <Nov94...
**82C822         PCIB (VLB-to-PCI bridge)                         c:94...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
**85C471/407     Green PC ISA-VLB 486 Single Chip                  <94
***Info:...
***Configurations:...
***Features:
o   Fully IBM PC/AT Compatible. 80486DX2/DX/SX/SL Enhanced, P24D/P24T/
    P24C, M6/M7 and Am486DXL/Am486DXL2 Single Chip Controller
o   Supports L1 Cache Writeback CPU (P24T/P24D/M6/M7) systems
o   Direct Mapped Cache Controller
    - Write-Back or Write-Through Schemes
    - Bank Interleave or Non-Interleave Cache
    - 0/1 Wait State Cache Write Hit
    - Flexible Cache Size : 32/64/128/256/512KB or 1MB
    - 7 bits or 8 bits TAG addresses
    - Flexible 2-1-1-1, 3-1-1-1, 2-2-2-2 and 3-2-2-2 Burst 
      Read/Write Timing
o   Fast Page Burst Mode DRAM Controller
    - 4 Banks up to 128MB of DRAMs
    - 256K/512K/1M/2M/4M/16MXN DRAM Type
    - Programmable DRAM Speed
    - Double-sided SIMMs
o   Two Programmable Non-Cacheable Regions (64KB-4MB area)
o   CAS before RAS Transparent DRAM Refresh
o   BIOS/Video ROM Cacheable
o   Shadow RAM in Increments of 32KB
    - Option to Disable Cache in Shadow RAM Area
o   256K Memory Relocation
o   8042 Emulation of Fast A2OGATE and CPU Reset
o   Supports Port 92h
o   Hardware/Software De-Turbo Switch
o   Supports Two VL-Bus Master
o   Supports Flash Memory
o   Supports Double/Single frequency input
o   CPU Operating frequency 0-100 MHz
o   Supports Power Management Mode
    - Supports the SMM and the SMI
    - CPU Stop Clock Function
    - Four Power Saving States
    - Long and Short System Timers
    - Supports the APM control
    - Supports Break Switch control
    - Power Saving also on non-SM] CPU
    - More System Event Monitoring and the Power Saving Control
o   AT Bus State Machine and Controller
o   Synchronous/Asynchronous AT Bus Clock
o   Programmable AT Bus Speed
    - l/2,l/3,1/4,l/5,1/6,1/8,l/10 of Input Clock or 7.159MHz
o   Programmable Wait State Generation
    - 1 or 2 Wait States for l6-Bit Transfers
    - 4 or 5 Wait States for 8-Bit Transfers
o   Programmable I/O Recovery Time
o   Programmable driving current for the DRAM and the ISA bus signals
o   32-Bit Data Buffer Between CPU and AT System
o   Data Conversion and Swapping Logic for 32-/16-/8-Bit Transfers 
    During CPU and DMA Cycles
o   Data Latches for AT Read Cycles
o   Parity Generation and Detection Logic
o   Port B Register and NMI Logic
o   Integrated Peripheral Controllers
    - 8259A x2 / 8237x2 / 8254 / 74LS612
o   387/487SX and Weitek 3167/4167 Coprocessors Interface
o   208-Pin PQFP
o   0.8nm Low Power CMOS Technology

**85C496/497     486-VIP 486 Green PC VESA/ISA/PCI Chipset         <95...
**85C501/502/503 Pentium/P54C PCI/ISA Chipset                <01/09/95...
**5101/5102/5103 Pentium/P54C PCI/ISA Chipset                <04/02/95...
**5120           Pentium PCI/ISA Chipset (Mobile)            <01/28/97...
**5501/5502/5503 Pentium/P54C PCI/ISA Chipset                <04/02/95...
**5511/5512/5513 Pentium PCI/ISA                             <06/14/95...
**5571           (Trinity) Pentium PCI/ISA Chipset (75MHz)   <12/09/96...
**5581/5582      (Jessie)  Pentium PCI/ISA Chipset (75MHz)   <04/15/97...
**5591/5592/5595 (David)   Pentium PCI A.G.P. Chipset        <01/09/98...
**5596/5513      (Genesis) Pentium PCI Chipset               <03/26/96...
**5597/5598      (Jedi)    Pentium PCI/ISA Chipset           <04/15/97...
**530/5595       (Sinbad) Host, PCI, 3D Graphics & Mem. Ctrl.<11/10/98...
**540            (Spartan) Super7 2D/3D Ultra-AGP Single C.S.<11/30/99
***Info:...
***Configurations...
***Features:...
**55x            SoC (System-on-chip)                        <03/14/02...
**
**Support chips:
**85C206     Integrated Peripheral Controller [no datasheet]         ?...
**5595       Pentium PCI System I/O                          <12/24/97...
**950        LPC I/O                                         <07/16/99...
**Other:...
**PII/III/Pro...
**Athlon etc...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...

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