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**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94
***Notes:...
***Info:
The 82497 Cache Controller and multiple 82492 Cache SRAMs combine with
the Pentium processor (735\90, 810\100) to form a CPU Cache chip set
designed for high performance servers and function-rich desktops. The
high-speed interconnect between the CPU and cache components has been
optimized to provide zero-wait state operation. This CPU Cache chip
set is fully compatible with existing software, and has new data
integrity features for mission critical applications.
The 82497 cache controller implements the MESI write-back protocol for
full multiprocessing support. Dual ported buffers and registers allow
the 82497 to concurrently handle CPU bus, memory bus, and internal
cache operation for maximum performance.
The 82492 is a customized high-performance SRAM that supports 32-,
64-, 128-bit wide memory bus widths, 16-, 32-, and 64-byte line sizes,
and optional sectoring. The data path between the CPU bus and memory
bus is separated by the 82492, allowing the CPU bus to handshake
synchronously, asynchronously, or with a strobed protocol, and
allowing concurrent CPU bus and memory bus operations.
***Configurations:...
***Features:...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:
***440FX (Natoma) 05/06/96...
***440LX (Balboa) 08/27/97...
***440BX (Seattle) c:Apr'98...
***440DX (?) c:?...
***440EX (?) c:Apr'98...
***440GX (Marlinespike) 06/29/98...
***440ZX & 440ZX-66 (?) 01/04/99...
***440ZX-M (?) 05/17/99...
***440MX (Banister) 05/17/99...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99
Chips:
Memory Access Controller (MAC)
Data Interface Buffer (DIB)
CPUs: 8x P-III Xeon Oct
DRAM Types: SDRAM PC100 2-way Interleave dual channel
Max Mem: 32GB
ECC/Parity: ECC
AGP speed: N/A
Bus Speed: 100
PCI Clock/Bus: 1/3 PCI-66/64
**800 series...
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*UMC...
**UM82C088 PC/XT Integration Chip <91
***Info:...
***Configurations:...
***Features:
o Fully IBM-PC/XT compatible
o 82C84 Clock generator with 2 clock-inputs to generate the CPU
clock. These are 14.318 MHz and 30 MHz which will support 4.77 MHz
and 10 MHz CPU clocks with 1/3 duty cycle.
o 82C88 Bus Controller
o 82C37 4 channel DMA controller, channel is used for DRAM refresh
o 82C59 8 channel interrupt controller, level is used for system
time base, and level 1 for keyboard input
o 82C53 3 channel timer, channel is used for system time base,
channel 1 for DRAM refresh, and channel 2 for speaker audio
o 82C55 Peripheral l/O r used for keyboard interface and system
configuration switch (same as the PC/XT)
o 74322 Keyboard interface, supports PC/XT type keyboard
o 74280 Parity check and generator
o 74670 4 bit page register for DMA
o Wait state logic
o NMI control logic
o ROM decoder for one 2764 and one 27256
o RAM decoder for 4164 or 41256 DRAM
o H/W and S/W CPU speed change and indicator
o Built-in delay line for RAS, CAS
o Low power consumption: less than 300 mW at 10 MHz CPU speed
o Small PCB size: 100 pin plastic Flat package
**UM82C230 286AT MORTAR Chip Set <91...
**UM82C210 386SX/286 AT Chip Set <91...
**UM82C3xx Twinstar & UM82C336F/N & UM82C39x [no datasheet] ?...
**UM82C380 386 HEAT PC/AT Chip Set <91...
**UM82C480 386/486 PC Chip Set c91...
**UM82C493/491 ??????????????? [no datasheet] ?...
**UM8498/8496 486 VL Chipset "Super Energy Star Green"[no dsheet]c94...
**UM8881/8886 HB4 PCI Chipset "Super Energy Star Green"[no dsheet]c94...
**UM8890 Pentium chipset [no datasheet] ?...
**
**Support Chips:
**UM82152 Cache Controller (AUStek A38152 clone) <91...
**UM82C852 Multi I/O For XT <91...
**UM82C206 Integrated Peripheral Controller <91...
**UM82c45x Serial/Parallel chips ?...
**Other chips:...
*Unresearched:...
*VIA...
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*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...
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