[Home] [This version is outdated, a new version is here]
*Title...
*Search:...
*Read Me/FAQ/General Info...
*_IBM...
*ACC Micro...
*ALD...
**93C488         5x86/486 Single Chip PCI controller            <Aug96
***Info:
ALD93C488 is  the worlds  first single chip  486/5x86 core  logic that
supports  Pipeline  Burst/Burst (PB)  Synchronous  SRAM  for L2  cache
implementation.   This  innovative feature  results  in much  superior
performance than  the previous generation core logic  design that uses
Asynchronous SRAM  for L2  cache. ALD93C488 also  features one  of the
highest integration in  the market and requires only  DRAM, BIOS and 9
pieces TTL  to complete a cost-effective PCI/ISA  system that supports
all available 486 pinout CPUs up to bus speed of 50 MHz.

Employing  state-of-the-art  0.6  Micron  CMOS  technology,  ALD93C488
integrates the  PB Cache  Controller, DRAM Controller,  ISA Peripheral
Controllers  ( Interrupt  Controller,  DMA Controller,  Timer/Counter,
Real-time Clock and  Keyboard Controller ), PCI and  ISA Interface and
an Enhanced Local Bus IDE Interface  into a single 208 QFP ( Quad Flat
Pack ) IC.

Applying  the same  technique as  the latest  Pentium systems,  the PB
Cache  Controller achieves  3,1,1,1  burst cycle  with Pipeline  Burst
Synchronous SRAM. Write  Back Cache Policy is employed  for better CPU
bandwidth utilization. Cache  size can range from 128 KB  to 1 MB. The
DRAM  Controller supports  Page, Fast  Page and  EDO DRAM  for maximum
compatibility and ultimate performance. Four  banks of DRAM, from 1 MB
to 256  MB, can  be accessed, with  Auto-detection of memory  type and
size.

The  PCI Interface meets  the requirements  of PCI  Specifications 2.1
(5V). To  support PCI cards  that have on-board intelligence,  two PCI
Bus Masters can  be used.  In addition to  Host-to-PCI Byte Merging, a
4-level Host-to-PCI Write Buffer  is designed to ensure maximum system
throughput.  The built-in Enhanced Local Bus IDE Interface supports up
to 4 IDE devices (PIO  Mode 4 timing).  Advanced features like Address
Swapping  between  Primary  and   Secondary  IDE  Ports  and  separate
Master/Slave modes are implemented.  To make computers environmentally
friendly,  ALD93C488  is  equipped  with integrated  power  management
technique to stop or slow down the CPU.

***Configurations:...
***Features:...
*ALi...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82395SX     Smart Cache                                     12/17/90
***Notes:...
**82396SX     Smart Cache                                     12/17/90...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94
***Notes:...
***Info:...
***Configurations:...
***Features:...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
**85C501/502/503 Pentium/P54C PCI/ISA Chipset                <01/09/95
***Notes:...
***Info:...
***Configurations:
85C501 PCI/ISA Cache Memory Controller (PCMC)
85C502 PCI Local Data Buffer (PLDB)
85C503 PCI System I/O (PSIO)

Revisions:
A3: 85C501MT + 85C503MS
A4: 85C501MU + 85C503MT
	

***Features:...
**5101/5102/5103 Pentium/P54C PCI/ISA Chipset                <04/02/95...
**5120           Pentium PCI/ISA Chipset (Mobile)            <01/28/97...
**5501/5502/5503 Pentium/P54C PCI/ISA Chipset                <04/02/95...
**5511/5512/5513 Pentium PCI/ISA                             <06/14/95...
**5571           (Trinity) Pentium PCI/ISA Chipset (75MHz)   <12/09/96...
**5581/5582      (Jessie)  Pentium PCI/ISA Chipset (75MHz)   <04/15/97...
**5591/5592/5595 (David)   Pentium PCI A.G.P. Chipset        <01/09/98...
**5596/5513      (Genesis) Pentium PCI Chipset               <03/26/96...
**5597/5598      (Jedi)    Pentium PCI/ISA Chipset           <04/15/97...
**530/5595       (Sinbad) Host, PCI, 3D Graphics & Mem. Ctrl.<11/10/98...
**540            (Spartan) Super7 2D/3D Ultra-AGP Single C.S.<11/30/99...
**55x            SoC (System-on-chip)                        <03/14/02...
**
**Support chips:
**85C206     Integrated Peripheral Controller [no datasheet]         ?...
**5595       Pentium PCI System I/O                          <12/24/97...
**950        LPC I/O                                         <07/16/99...
**Other:...
**PII/III/Pro...
**Athlon etc...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...