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*Contaq . . . . . [no datasheets, some info]...
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**82420TX/ZX PCIset (for 486) TX (Saturn), ZX (Saturn II) c:Nov92
***Notes:...
***Info:...
***Versions:...
***Configurations:...
***Features:...
**82420EX PCIset (for 486) EX (Aries) (82425EX/82426EX) <Dec94...
**82430LX PCIset (Pentium) LX (Mercury) (82433LX/82434LX) 03/22/93...
**82430NX PCIset (Pentium) NX (Neptune) (82433NX/82434NX) Mar94...
**82430FX PCIset (Pentium) FX (Triton I) (82437FX/82438FX)01/31/95...
**82430MX PCIset (Pentium) MX (Mobile Triton)(82437/438MX)11/01/95...
**82430HX PCIset (Pentium) HX (Triton II) (82439HX) 02/12/96...
**82430VX PCIset (Pentium) VX (Triton II) (82437VX/82438) 02/12/96...
**82430TX PCIset (Pentium) TX (Triton II) (82439TX) 02/17/97...
**82450KX/GX PCIset (Pentium Pro) KX/GX (Mars/Orion) 11/01/95...
**
**Support Chips:
**82091AA Advanced Interface Peripheral (AIP) c93...
**8289 Bus Arbiter (808x) c79...
**82289 Bus Arbiter for iAPX 286 Processor Family c83...
**82258 Advanced Direct Memory Access Coprocessor(ADMA) 01/01/84...
**82335 High-Integration Interface Device For 386SX c:Nov88...
**82360SL I/O Subsystem 10/05/90...
**82370 Integrated System Peripheral (for 82376) c:Oct88...
**82371FB/SB PCI ISA IDE Xcelerator 82371FB/82371SB (PIIX/3) 01/31/95...
**82371MX Mobile PCI I/O IDE Xcelerator (MPIIX) 11/01/95...
**82371AB PCI-TO-ISA / IDE Xcelerator 82371AB (PIIX4) 02/17/97...
**82374/82375 PCI-EISA Bridge (82374EB/82375EB, 374SB/375SB) c:Mar93...
**82378 System I/O (SIO) (82378IB and 82378ZB) c:Mar93...
**82379AB System I/O-APIC (SIO.A) <Dec94...
**82380 32-bit DMA Controller w/ Integrated Peripherals 02/01/87...
**82380FB/AB PCIset: 82380FB Mobile PCI-to-PCI Bridge(MPCI2) 02/17/97...
**82384 Clock Generator and Reset Interface c86...
**82385 32-bit Cache Controller for 80386 09/29/87...
**82385SX 32-bit Cache Controller for 80386SX 01/25/89...
**82395DX High Performance Smart Cache 06/18/90...
**82395SX Smart Cache 12/17/90...
**82396SX Smart Cache 12/17/90...
**82485 Turbo Cache (and 485Turbocache) c90...
**82489DX Advanced Programmable Interrupt Controller 10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
**82C566/7/8 Viper-Max Chipset Scalable MultiMedia PC Solution ?
***Info:...
***Configurations:...
***Features:...
**82C571/572 486/Pentium c:93...
**82C576/7/8 Viper Xpress [no datasheet] ?...
**82C576/8/9 Viper XPress+ [no datasheet, some info] <01/16/97...
**82C596/597 PTMAWB Pentium Adaptive Write-back (Cobra) c:93...
**82C650/1/2 Discovery (Pentium Pro) [no datasheet] ?...
**82C681/2/6/7 386/486WB EISA c:92...
**82C683 386/486AWB EISA [no datasheet] ?...
**82C693/6/7 Pentium uP Write Back Cache EISA c:93...
**82C700 FireStar c:97...
**82C701 FireStar Plus c:97...
**82C750 Vendetta [no datasheet] ?...
**82c801 SCWB2 DX Single Chip Solution c:92...
**82C802 SCWB2 PC/AT Single Chip [no datasheet] ?...
**82C802G/GP System/Power Management Controller (cached) c:93...
**82C895 System/Power Management Controller (cached) c:Sep94...
**82C898 System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2 Buffer Devices <Nov94...
**82C822 PCIB (VLB-to-PCI bridge) c:94...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
**5597/5598 (Jedi) Pentium PCI/ISA Chipset <04/15/97
***Info:...
***Configurations:...
***Features:
o Support Intel Pentium CPU and other compatible CPU host bus
at 50/55/60/66/75 MHz
o Support CPU with MMX feature
o Support the Pipelined Address Mode of Pentium CPU
o Support the Full 64-bit Pentium Processor data Bus
o Meet PC97 Requirements
o Integrated Second Level (L2) Cache Controller
- Write Back Cache Modes
- 8 bits or 7 bits Tag with Direct Mapped Cache Organization
- Integrated 16K bits Dirty RAM
- Support Pipelined Burst SRAM
- Support 256 KBytes and 512 KBytes Cache Sizes
- Cache Hit Read/Write Cycle of 3-1-1-1
- Cache Back-to-Back Read/Write Cycle of 3-1-1-1-1-1-1-1
o Integrated DRAM Controller
- Support 6 RAS lines (3 Banks) of FPM/EDO/SDRAM DIMMs/SIMMs
- Support 2Mbytes to 384Mbytes of main memory
- Support Cacheable DRAM Sizes up to 128 MBytes.
- Support 256K/512K/1M/2M/4M/8M/16M/32M x N FPM/EDO/SDRAM DRAM
- Support 64 Mb DRAM Technology
- Support 3.3V or 5V DRAM.
- Supports Symmetrical and Asymmetrical DRAM.
- Support 32 bits/64 bits mixed mode configuration
- Support Concurrent Write Back
- Support CAS before RAS Refresh
- Support Relocation of System Management Memory
- Programmable CAS#, RAS#, RAMWE# and MA Driving Current.
- Fully Configurable for the Characteristic of Shadow RAM (640
KBytes to 1 MBytes)
- Support FPM DRAM 5-3-3-3(-3-3-3-3) Burst Read Cycles
- Support EDO DRAM 5-2-2-2(-2-2-2-2) Burst Read Cycles
- Support SDRAM 6-1-1-1(-2-1-1-1) Burst Read Cycles
- Support X-1-1-1/X-2-2-2/X-3-3-3 Burst Write Cycles
- Support 8 Qword Deep Buffer for Read/Write Reordering, Dword
Merging and 3/2-1-1-1 Post write Cycles
- Two Programmable Non-Cacheable Regions
- Option to Disable Local Memory in Non-Cacheable Regions
- Shadow RAM in Increments of 16 KBytes
o Integrated PMU Controller
- Meet ACPI Requirements
- Support Both ACPI and Legacy PMU
- Support Suspend to Disk
- Support SMM Mode of CPU
- Support CPU Stop Clock
- Support Power Button for ACPI function
- Support Automatic Power Control for system power off function
- Support Modem Ring-in, RTC Alarm Wake up
- Support Thermal Detection
- Support GPIOs, and GPOs for External Devices Control
- Support Programmable Chip Select
o Provides High Performance PCI Arbiter.
- Support up to 4 PCI Masters
- Support Rotating Priority Mechanism
- Hidden Arbitration Scheme Minimizes Arbitration Overhead.
- Support Concurrency between CPU to Memory and PCI to PCI.
o Integrated Host-to-PCI Bridge
- Support Asynchronous and Synchronous PCI Clock
- Translates the CPU Cycles into the PCI Bus Cycles
- Provides CPU-to-PCI Read Assembly and Write Disassembly
Mechanism
- Translates Sequential CPU-to-PCI Memory Write Cycles into PCI
Burst Cycles
- Zero Wait State Burst Cycles
- Support IDE Posted Write
- Support Pipelined Process in CPU-to-PCI Access
- Support Advance Snooping for PCI Master Bursting
- Maximum PCI Burst Transfer from 256 Bytes to 4 KBytes
o Integrated Posted Write Buffers and Read Prefetch Buffers to
Increase System Performance
- CPU-to-Memory Posted Write Buffer (CTMFF) with 8 QW Deep,
Always Sustains 0 Wait Performance on CPU-to-Memory.
- CPU-to-Memory Read Buffer with 4 QW Deep
- CPU-to-PCI Posted Write Buffer(CTPFF) with 8 DW Deep
- PCI-to-Memory Posted Write Buffer(PTHFF) with 8 QW Deep, Always
Streams 0 Wait Performance on PCI-to/from-Memory Access
- PCI-to-Memory Read Prefetch Buffer(CTPFF) with 8 QW Deep
o Integrated Video/Graphics Accelerator
- Support 32-bit PCI local bus standard revision 2.1
- Built-in an enhanced 64-bit BITBLT graphics engine
- Support tightly coupled host interface to VGA to speed up GUI
performance and the video playback frame rate
- Support direct access to video memory to speed up GUI
performance and the video playback frame rate
- Shared System Memory Area 0.5MB, 1MB, 1.5MB, 2MB, 2.5MB, 3MB,
3.5MB, 4MB
- Built-in programmable 24-bit true-color RAMDAC with reference-
voltage generator
- Built-in dual-clock generator
- Built-in monitor-sense circuit
- Built-in Phillips SAA7110/SAA7111, Brooktree Bt815/817/819A
(8 -bit SPI mode 1,2) video decoder interface
- Built-in Standard feature connector logic support
o Integrated PCI-to-ISA Bridge
- Translates PCI Bus Cycles into ISA Bus Cycles
- Translates ISA Master or DMA Cycles into PCI Bus Cycles
- Provides a Dword Post Buffer for PCI to ISA Memory cycles
- Two 32 bit Prefetch/Post Buffers Enhance the DMA and ISA Master
Performance
- Fully Compliant to PCI 2.1
o Enhanced DMA Functions
- 8-, 16- bit DMA Data Transfer
- ISA compatible, and Fast Type F DMA Cycles
- Two 8237A Compatible DMA Controllers with Seven Independent
Programmable Channels
- Provides the Readability of the two 8237 Associated Registers
- Support Distributed DMA
o Built-in Two 8259A Interrupt Controllers
- 14 Independently Programmable Channels for Level- or Edge-
triggered Interrupts
- Provides the Readability of the two 8259A Associated Registers
- Support Serial IRQ
o Three Programmable 16-bit Counters compatible with 8254
- System Timer Interrupt
- Generates Refresh Request
- Speaker Tone Output
- Provides the Readability of the 8254 Associated Registers
o Built-in Keyboard Controller
- Hardwired Logic Provides Instant Response
- Support PS/2 Mouse interface
- Support Hot Key "Wake-up" Function
- Capable of Enable/Disable Internal KBC and PS2 Mouse
o Built-in Real Time Clock(RTC) with 256B CMOS SRAM
- Built-in up to one Month Alarm for ACPI
o Fast PCI IDE Master/Slave Controller
- Bus Master Programming Interface for ATA Windows 95 Compliant
Controller
- Support PCI Bus Mastering
- Plug and Play Compatible
- Support Scatter and Gather
- Support Dual Mode Operation - Native Mode and Compatibility Mode
- Support IDE PIO Timing Mode 0, 1, 2 ,3 and 4
- Support Multiword DMA Mode 0, 1, 2
- Support Ultra DMA/33
- Two Separate IDE Bus
- Two 16 Dword FIFO for PCI Burst Transfers.
o Universal Serial Bus Host Controller
- OpenHCI Host Controller with Root Hub
- Two USB ports
- Support Legacy Devices
- Support Over Current Detection
o Support I2C serial Bus
o Support the Reroutibility of the four PCI Interrupts
o Support 2Mb Flash ROM Interface
o Support Signature Analysis for automatic test for VGA controller
o Support NAND Tree for ball connectivity testing
o 553-Balls BGA Package
o 0.35μm 3.3V Technology
**530/5595 (Sinbad) Host, PCI, 3D Graphics & Mem. Ctrl.<11/10/98...
**540 (Spartan) Super7 2D/3D Ultra-AGP Single C.S.<11/30/99...
**55x SoC (System-on-chip) <03/14/02...
**
**Support chips:
**85C206 Integrated Peripheral Controller [no datasheet] ?...
**5595 Pentium PCI System I/O <12/24/97...
**950 LPC I/O <07/16/99...
**Other:...
**PII/III/Pro...
**Athlon etc...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
**Later AMD
***Notes (Unverified Information!):...
***VT8371 KX-133...
***VT8361 KLE133, Trident Blade 3D c:2001...
***VT8362/5 KN-133, KM-133 (VS2-K7) ProSavage4...
***VT8363 KT-133, KZ-133...
***VT8363A KT-133A c:2001...
***VT8363E KT-133E...
***VT8364 KL-133 Savage4 AGP...
***VT8364A KL-133A Savage4 AGP...
***VT8365A KM-133A (VS2-K7) ProSavage4...
***VT8366/8372 KT-266, KT-266DP, KN-266 c:Jan01...
***VT8366A KT-266A c:Sep01...
***VT8367 KT-333 c:Feb02...
***VT8367A KT-333A c:Feb02
Chips:
[VT8367A] [VT8235],
CPUs: Athlon Duron,
DRAM Types: DDR PC2700 Reg DDR
Max Mem: 4GB
ECC/Parity: ECC,
AGP speed: 1x 2x 4x 8x,
Bus speed: 200/266/333 (DDR)MHz
PCI Bus: 1/3 1/4 1/5 Pseudosynch PCI 2.2
North bridge seems to be the same as KT-333 but with 8x AGP
***? KM-333, KN-333 Zeotrope AGP ...
***VT8368 KT-400 c:Aug02...
***VT8375 KL266, KM-266 (VS12-K7) ProSavage8...
***VT8377A KT-400A c:Mar03...
***VT8378 KM-400, KN-400 UniChrome AGP...
***? KM-400A...
***VT8377? KT-600 c:May03...
***VT8379 KT-880 c:Feb04...
**Other...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...
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