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**82C110   IBM PS/2 Model 30/Super XT                                ?
***Notes:...
***Info:
The 82C110 is a single chip implementation of most of the system logic
necessary to implement a super XT compatible system with PS/2 Model 30
functionality using either an  8086 or 8088 microprocessor. The 82C110
can  be used  with either  8  or 16-bit  microprocessors.  The  82C110
includes features  which will enable  the PC manufacturer to  design a
super PS/2 Model 30/XT  compatible system with the highest performance
at  10  MHz  zero  wait   state  system  with  an  8086,  the  highest
functionality  with  dual  clock  and  2.5 MB  DRAM  {with  integrated
Extended Memory  System control  logic}, the highest  integration with
the lowest component count SMT design.

The 82C110 can be combined with-CHIPs’ 82C601 Multifunction Controller
and 82C451 VGA Graphics Controller to provide a high performance, high
integration PS/2 Model 30 type system.

The 82C110 supports most of the peripheral functions on the PS/2 Model
30 planar board; 8284 compatible  clock generator with the option of 2
independent  oscillators, 8288 compatible  bus controller,  8237 comp-
atible  DMA  controller, 8259  compatible  interrupt controller,  8254
compatible  timer/counter,  8255 compatible  peripheral  I/O port.  XT
Keyboard interface, Parity Generation and Checking for DRAM memory and
memory controller for DRAM memory sub-system.

The  82C110 enables  the  user to  add  PS/2 Model  30 superset  func-
tionality on the planar board: dual clock, with synchronized switching
between  the two,  clocks.  built-in  Lotus-Intel-Microsoft  (LIM) EMS
support for up to 2.5 Megabytes of DRAM.

The  82C110 supports a  very flexible  memory architecture.   The DRAM
controller  supports 64K,  256K  and  1M DRAMs.   These  DRAMs gen  be
organized in  four banks of up  to a maximum  of 2.5 MB on  the planar
board. The  2.5 MB memory can  be implemented with  2 banks of 7M  X 1
DRAMs, partitioned locally as 540KB of real memory and 1,875 MB of EMS
memory. The 82C110 is packaged in a 100-pin plastic flatpack.

***Configurations:...
***Features:...
**82C235   Single Chip AT (SCAT)                                   c89...
**82C836   Single Chip 386sx (SCATsx)                              <91...
**F8680/A  PC/CHIP Single-Chip PC                                  c93...
**
**Support Chips:
**64200    (Wingine) High Performance 'Windows Engine'         c:Oct91
***Info:...
***Versions:...
***Features:
o   Cost effective Windows Accelerator
o   Interfaces directly with X86 SX/DX/DX2 Systems
o   Interfaces directly with ISA486 CHIPSet
o   High performance achieved via direct access frame buffer Memory 
    Bus Architecture
o   Direct linear mapping of entire video memory anywhere in system 
    memory space
o   Flexible video memory configurations:  8, 16, or 32-bit wide 
    VRAM (256KB–2MB)
o   Supports the following display modes with 1MB of VRAM:
    • 8bpp up to 1024x768 (interlaced or non-I/L)
    • 16bpp up to 800x600 (with Sierra RAMDAC)
    • 24bpp up to 640x480 (with Bt484 or equiv)
o   Supports higher resolution display modes with 2MB VRAM:
    • 8bpp up to 1280x1024 (non-interlaced)
    • 16bpp up to 1024x768 (interlaced or non-I/L)
    • 24bpp up to 800x600 (non-interlaced)
o   Highly integrated design (non-multiplexed system bus, direct bus 
    drive, minimum external glue logic)
o   All video shifting performed on-chip to allow use of low-cost VGA 
    RAMDACs (allows video rates to 80 MHz)
o   Compatible with high-resolution color palette RAMDACs such as the 
    Bt484 and TI 34075 having separate 8-bit and 32-bit parallel 
    inputs for direct connection to VRAM serial data (allows video 
    rates to 135 MHz)
o   Full VGA compatibility
o   Interfaces directly with the 82C481 True-Color Graphics 
    Accelerator
o   Direct interface to 82C404 programmable clock 
o   In-Circuit Testability Features
o   Small low-cost package:  EIAJ-standard 160-pin plastic flat pack
o   Chip pinouts optimized for PCB layo


**82C206   Integrated Peripheral Controller                        c86...
**82C601/A Single Chip Peripheral Controller                 <08/30/90...
**82C607   Multifunction Controller                             <Jun88...
**82C710   Universal Peripheral Controller                     c:Aug90...
**82C711   Universal Peripheral Controller II                  c:Jan91...
**82C712   Universal Peripheral Controller II                  c:Jan91...
**82C721   Universal Peripheral Controller III                 c:May93...
**82C735   I/O Peripheral Controller With Printgine            c:Jul93...
**82C835   Single CHIP 386sx AT Cache Controller               c:Apr91...
**F87000   Multi-Mode Peripheral Chip                         11/23/93...
**Other:...
**Disk:...
**Video:...
*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82395SX     Smart Cache                                     12/17/90
***Notes:...
**82396SX     Smart Cache                                     12/17/90...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
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