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**CS8233 PEAK/386 AT (Cached) (82C311/82C315/82C316) c:Dec90
***Info:...
***Configurations:...
***Features:
o 100% IBM PC AT Cache based 386/AT Compatible CHIPSet
o Supports 16, 20, 25 and 33 MHz 80386DX based Systems
o Independent clock to support correct AT bus timing
o Flexible architecture allows usage in any iAPX 386 design
o A complete 386/AT Cache based PC AT now requires only 19 IC's
plus memory
o Integrates Cache Directory and CPU/Cache/DRAM Controller on a
single chip to provide PEAK integration and PEAK performance.
o Integrated CPU/Cache/DRAM Controller enhances 80386DX CPU and
memory system performance
- Averages to nearly zero wait state memory access
- Zero wait state non-pipelines read hit access
- Zero wait state non-pipelined write access
- Buffered-write through DRAM update scheme to minimize write
cycle penalty
- Cache hit rate up to 99%
o Supports 32KB, 64KB, and 128KB two-way set associative cache
organization
- 32 byte line size
- 4 byte sub-line size with associative valid bit
- Support blocks (of variable size - 4KB to 4M) of main memory
as non-cacheable
address space
- Supports caching of data and code
o Tightly coupled 80386DX interface
- Deigned to interface directly with the 80386DX
- Supports 16, 20, 25 and 33MHz operation
- Integrated support for 80387DX a Weitek 3167 coprocessor
o Flexible memory architecture to support:
- Memory configurations up to 128 MB
- Programmable DRAM wait states
- 256K, 1MB, and 4MB DRAMs in configurations of up to 4 blocks
and 8 banks
- Staggered RAS during refresh
- Hidden refresh and burst refresh
- 256K/512K/1M PROMs
o Supports shadowing of BIOS EPROMs
**CS8236 386/AT (82C301/2/3/4/5/6/206) c86...
**CS8237 TURBO CACHE-BASED 386/AT (82C301/7/3/4/5/6/206) c86...
**CS8238 CHIPS/280 & 281 (386 MCA)(82C321/322/325/223/226) c:Aug89
***Info:
CHIPS/280 is a 7-device, enhanced CMOS implementation of most of the
system logic necessary to implement personal computers compatible to
IBM PS/2 Model 70/80. CHIPS/280 enables OEMs to offer compatible PS/2
models 70/80, that are more integrated and superior in performance
than IBM's Model 70/80.
CHIPS/280 includes the CS8238 System Logic CHIPSet, the 82C607
Multi-Function Controller with Analog Data Separator and 16550
compatible serial port, and the Enhanced Gate-Level Compatible
82C451/452 VGA chip as indicated in Figures 1a and lb [see data
sheet]. With these 7 VLSI devices, it requires only 59 additional
components plus memory to implement compatible PS/2 Models 70/80
superior to IBM's models.
CHIPS/280 is designed to maximize the performance of the 80386
microprocessor by coupling it to a high performance page/interleaved
memory sub-system. The maximum page size supported by the CHIPS/280
architecture is 16 KBytes when 1 Mbyte DRAMs are used (16 MB of
onboard Memory) and the four way interleaved mode of operation is
selected. When executing within a page, the DRAM memory sub-system can
execute at the same speed as the processor. To the 386, the mem- ory
sub-system appears as a 16 KByte direct mapped cache, using relatively
inexpensive DRAMs. When operating at 16, 20 or 25 MHZ, the average
waitstate incurred is less than 0.7. Additionally, by using Shadow RAM
techniques, the BIOS code can also be executed with near zero wait
states.
In addition to the high performance memory interface, CHIPS/280
supports a fast Matched Memory Cycle reducing the access time from 200
ns to 120 ns at 25 MHz. CHIPS proprietary Fast VGA cycle allows VGA
I/O accesses to be performed within 187.5 ns@ 16 MHz, 150 ns @ 20 MHz,
and 120 ns @ 25 MHz.
Regardless of the CPU speed, the DMA controller operates at 10
MHz. Once the DMA and the peripherals are tuned, for example, with a
1:1 interleaving on the Hard Disk, CHIPS/280 continues to deliver
dependable high performance.
***Configurations:...
***Features:...
**CS82310 PEAK/DM 386 AT (82C351/82C355/82C356) c91...
**CS8281 NEATsx (386SX) (82C811/812/215/206) c:Dec89...
**CS8283 LeAPset-sx (82C841/82C242/82C636) c:Mar90...
**CS8285 PEAKsx (82C836/82C835) c91...
**CS8288 CHIPSlite-sx (82C836/82C641/82C835) c?...
**CS4000 WinCHIPS (64200/84021/84025) c92...
**CS4021 ISA/486 (84021/84025) c92...
**CS4031 CHIPSet (84031/84035) 5/10/93...
**CS4041/5 CHIPSet (84041/84045) 2/10/95...
**CB8291 ELEAT [no datasheet] c90...
**CB8295 ELEATsx [no datasheet] c90...
**82C100 IBM PS/2 Model 30/Super XT ?...
**82C110 IBM PS/2 Model 30/Super XT ?...
**82C235 Single Chip AT (SCAT) c89...
**82C836 Single Chip 386sx (SCATsx) <91...
**F8680/A PC/CHIP Single-Chip PC c93...
**
**Support Chips:
**64200 (Wingine) High Performance 'Windows Engine' c:Oct91...
**82C206 Integrated Peripheral Controller c86...
**82C601/A Single Chip Peripheral Controller <08/30/90...
**82C607 Multifunction Controller <Jun88...
**82C710 Universal Peripheral Controller c:Aug90...
**82C711 Universal Peripheral Controller II c:Jan91...
**82C712 Universal Peripheral Controller II c:Jan91...
**82C721 Universal Peripheral Controller III c:May93...
**82C735 I/O Peripheral Controller With Printgine c:Jul93...
**82C835 Single CHIP 386sx AT Cache Controller c:Apr91...
**F87000 Multi-Mode Peripheral Chip 11/23/93...
**Other:...
**Disk:...
**Video:...
*Contaq . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82395SX Smart Cache 12/17/90
***Notes:...
**82396SX Smart Cache 12/17/90...
**82485 Turbo Cache (and 485Turbocache) c90...
**82489DX Advanced Programmable Interrupt Controller 10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
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