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**M1541/42/33/43 Aladdin V & V+ 50-100MHz ?
***Info:...
***Configurations:...
***Features:...
**M1561/43/35D Aladdin 7 ArtX [no datasheet, some info] 11/08/99...
**M6117 386SX Single Chip PC <97...
**
**Support Chips:
**M1535/D South Bridge ?...
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**May not exist:...
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*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
**CS8238 CHIPS/280 & 281 (386 MCA)(82C321/322/325/223/226) c:Aug89
***Info:
CHIPS/280 is a 7-device, enhanced CMOS implementation of most of the
system logic necessary to implement personal computers compatible to
IBM PS/2 Model 70/80. CHIPS/280 enables OEMs to offer compatible PS/2
models 70/80, that are more integrated and superior in performance
than IBM's Model 70/80.
CHIPS/280 includes the CS8238 System Logic CHIPSet, the 82C607
Multi-Function Controller with Analog Data Separator and 16550
compatible serial port, and the Enhanced Gate-Level Compatible
82C451/452 VGA chip as indicated in Figures 1a and lb [see data
sheet]. With these 7 VLSI devices, it requires only 59 additional
components plus memory to implement compatible PS/2 Models 70/80
superior to IBM's models.
CHIPS/280 is designed to maximize the performance of the 80386
microprocessor by coupling it to a high performance page/interleaved
memory sub-system. The maximum page size supported by the CHIPS/280
architecture is 16 KBytes when 1 Mbyte DRAMs are used (16 MB of
onboard Memory) and the four way interleaved mode of operation is
selected. When executing within a page, the DRAM memory sub-system can
execute at the same speed as the processor. To the 386, the mem- ory
sub-system appears as a 16 KByte direct mapped cache, using relatively
inexpensive DRAMs. When operating at 16, 20 or 25 MHZ, the average
waitstate incurred is less than 0.7. Additionally, by using Shadow RAM
techniques, the BIOS code can also be executed with near zero wait
states.
In addition to the high performance memory interface, CHIPS/280
supports a fast Matched Memory Cycle reducing the access time from 200
ns to 120 ns at 25 MHz. CHIPS proprietary Fast VGA cycle allows VGA
I/O accesses to be performed within 187.5 ns@ 16 MHz, 150 ns @ 20 MHz,
and 120 ns @ 25 MHz.
Regardless of the CPU speed, the DMA controller operates at 10
MHz. Once the DMA and the peripherals are tuned, for example, with a
1:1 interleaving on the Hard Disk, CHIPS/280 continues to deliver
dependable high performance.
***Configurations:...
***Features:...
**CS82310 PEAK/DM 386 AT (82C351/82C355/82C356) c91...
**CS8281 NEATsx (386SX) (82C811/812/215/206) c:Dec89...
**CS8283 LeAPset-sx (82C841/82C242/82C636) c:Mar90...
**CS8285 PEAKsx (82C836/82C835) c91...
**CS8288 CHIPSlite-sx (82C836/82C641/82C835) c?...
**CS4000 WinCHIPS (64200/84021/84025) c92...
**CS4021 ISA/486 (84021/84025) c92...
**CS4031 CHIPSet (84031/84035) 5/10/93...
**CS4041/5 CHIPSet (84041/84045) 2/10/95...
**CB8291 ELEAT [no datasheet] c90...
**CB8295 ELEATsx [no datasheet] c90...
**82C100 IBM PS/2 Model 30/Super XT ?...
**82C110 IBM PS/2 Model 30/Super XT ?...
**82C235 Single Chip AT (SCAT) c89...
**82C836 Single Chip 386sx (SCATsx) <91...
**F8680/A PC/CHIP Single-Chip PC c93...
**
**Support Chips:
**64200 (Wingine) High Performance 'Windows Engine' c:Oct91...
**82C206 Integrated Peripheral Controller c86...
**82C601/A Single Chip Peripheral Controller <08/30/90...
**82C607 Multifunction Controller <Jun88...
**82C710 Universal Peripheral Controller c:Aug90...
**82C711 Universal Peripheral Controller II c:Jan91...
**82C712 Universal Peripheral Controller II c:Jan91...
**82C721 Universal Peripheral Controller III c:May93...
**82C735 I/O Peripheral Controller With Printgine c:Jul93...
**82C835 Single CHIP 386sx AT Cache Controller c:Apr91...
**F87000 Multi-Mode Peripheral Chip 11/23/93...
**Other:...
**Disk:...
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*Contaq . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94
***Notes:
Date source: 1995_Intel_Pentium_Processors_and_Related_Components.pdf
Information taken from:
1995_Intel_Pentium_Processors_and_Related_Components.pdf*
8249x Cache controllers.pdf**
>* Datasheet dated Nov'94
>** Datasheet undated, whole document dated '95
The info and features section have been solely sourced from the first
source. The second source provides far more detail. Additional
information in the configurations section and below have been sourced
from the second.
"Although the 82497 Cache Controller is part of the Pentium processor
(735\90, 815\100, 1000\120, 1110\133) CPU-Cache Chip Set and the 82496
Cache Controller is part of the Pentium Processor (510\60, 567\66)
Chip Set, the two parts are functionally identical except for the
differences noted in this section." - p491
Aside from some minor differences in pin configuration, the main
difference is the direct support for 3.3V processors. This chipset is
still a 5V part. The cache operates at bus speed, max 66MHz.
This chip was used on the Pentium 90MHz CPU complexes of Intel's
Xpress platform. Specifically the BXCPUPENT90 (Single 90MHz, 16
82492s). Also found on IBM 9595/Server 500 Pentium 90MHz complexes.
***Info:...
***Configurations:...
***Features:...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
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