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**?????  (Profusion)    c:99
Chips:         
Memory Access Controller (MAC)  
Data Interface Buffer (DIB)
CPUs:          8x P-III Xeon Oct
DRAM Types:    SDRAM PC100 2-way Interleave dual channel
Max Mem:       32GB
ECC/Parity:    ECC
AGP speed:     N/A
Bus Speed:     100
PCI Clock/Bus: 1/3 PCI-66/64



**800 series...
*Headland/G2...
**HT22          386SX/286 Single Chip (25 MHz)                 c:Sep91
***Info:
The HT22  is an  advanced PC/AT compatible,  single-chip 80386SX/80286
system  design solution.   This highly  integrated single  chip allows
simple, low  cost system design  options while featuring  high perfor-
mance,  low  power  consumption,  and  minimum  board  space  require-
ments. Advanced  memory management  features include support  for page
mode,  2 or  4-way interleaving  in both  pipelined  and non-pipelined
modes.  The EMS  4.0 hardware implementation features dual  sets of 32
registers   with  full   context  support   for   highest  performance
optimization  of  extended local  memory  accesses.   An advanced  EMS
hardware  write-protect option  has  been added  for  maximum EMS  4.0
compatibility. The HTZ2 supports 256K, 1M  and 4MB DRAMs in 1 by 1 and
1 by 4 device configurations for up to 20MB of on-board system memory.
16MB  is  addressed  directly   by  system  resources,  the  remainder
addressed by the EMS mode.

A flexible Shadow  RAM option for System and Video BIOS  as well as 8-
16-bit BIOS options adds to overall design versatility.

A  complete PC/AT  compatible  system with  advanced  features may  be
implemented with minimal external support logic. The HT22 performs all
CPU  and peripheral support  functions in  a single  chip.  Integrated
device  functions include  DMA Controllers,  a Memory  Mapper, Timers,
Counters, Interrupt  Controllers, a Bus Controller  and all supporting
circuitry for PC  core logic requirements. The chip  also contains all
the  necessary  address buffers,  data  transceivers, memory  drivers,
parity  checking   and  supporting  circuitry  for   a  complete  high
performance computer  solution.  An  asynchronous AT Bus  clock allows
for  a constant 8MHz  Bus clock  rate for  highest bus  device compat-
ibility as  defined in IEEE  Spec P996. This  device is packaged  in a
208-pin Plastic Quad Flat Pack.

***Configurations:...
***Features:...
**HT25          3-volt Core Logic for 386SX                    c:Dec92...
**HT35          Single-Chip Peripheral Controller [partial info]     ?...
**HTK320        386DX Chip Set                                 c:Sep91...
**HTK340        "Shasta" 486 Chip Set                          c:Jun92...
**Support Chips:
**HT44          Secondary Cache                                c:Jun92...
**Other:...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
**W83C553F    System I/O Controller With PCI Arbiter           c:sep95
***Info:...
***Versions:...
***Features:
High Integration PCI-ISA solution
o  Optimized for lowest system cost
o  Complies with PCI Revision 2.0 specification
o  Universal PCI device supporting x86 and PowerPC (non-x86) modes of 
   operation

Nand tree on most signal pins to facilitate board level testing in PCB 
manufacturing environment

Integrated PCI Bus Master IDE controller
o  Dual channel Bus Master IDE for up to 4 peripherals, including hard 
   drives, ATAPI (IDE) CD-ROMs, tapes, etc.
o  Multi-threading capability allows two simultaneous I/O processes
o  Independent IDE Timing registers allow fast/slow devices on the 
   same cable
o  Two independent DMA channels for Bus Master scatter/gather DMA 
   transfers across the PCI bus
o  Large 64 byte DMA FIFO for zero wait state PCI burst transfers
o  Support for multiword DMA Mode 1 (13.3 MB/s), Mode 2 (16.6 MB/s) 
   IDE drives
o  PIO IDE support for Modes 0-4 disks
o  Edge rate controlled outputs directly drive IDE headers
o  Four byte pre-fetch and posted write buffers
o  DMA channels can be re-configured for P-n-P motherboard devices
o  Software and register set compatible with Intel Bus Master PCI-IDE 
   specification (SFF 8038i)
o  Supported by existing device drivers for MS-DOS, Windows, NT 3.1, 
   NT 3.5x, NT4.0, OS/2 2.1, OS/2 Warp, NetWare 3.12 and 4.x**
o  Recompiled PowerPC device drivers also available

>** OS/2, Novell driver by DTC

PCI Arbiter
o  Supports CPU, IDE, ISA and five additional bus masters
o  Programmable access windows allow fine tuning of PCI access for 
   each bus master
o  Can be disabled on power-up via strapped pin

Power Management Break Event support for Green PC applications

Built-in Integrated Peripheral Controller (IPC) with standard PC-AT 
peripherals

o  Two 82C37A DMA controllers (types A, B, and F)
   - 32-bit addressing allows use of alternate CPUs, such as PowerPC
   - supports multiple 8-bit and 16-bit scatter/gather DMA channels
o  Two 82C59A interrupt controllers
   - all IRQ inputs may be programmed for edge or level sensitivity
o  One 82C54 counter/timer
o  Routes external PCI interrupts to a software-selectable interrupt 
   channel

PCI Bus Interface
o  PCI Revision 2.1 compliant
o  PCI clock frequencies up to 33 MHz at 5V
o  Supports delayed completion for ISA cycles
o  Active address decoding for internal I/O devices
o  Subtractive decoding for ISA bridge, KBC and RTC
o  Supports disconnection (with retry) for slow internal accesses to 
   improve latency
o  Short PCI bus ownership when mastering to minimize overall system 
   latency
o  Fast DMA transfers from I/O devices to PCI agents as a master
o  Separate request and grant signals for ISA DMA and IDE controllers

ISA Bus Bridge
o  Full implementation of a standard ISA bus
o  Separate ISA and IDE data buses reduce noise and increase system 
   performance
o  Synchronous PCI-to-ISA interface with direct drive for 5 ISA slots

XD-Bus interface
o  Support for BIOS ROM or PowerPC systems boot ROM
o  Support for flash EPROM
o  Provides keyboard controller connections
o  Provides real-time clock connections
o  Provides data buffer control

Miscellaneous
o  Port B support
o  Port 92 support

Uses  0.6um, ultra-low  power CMOS  technology for  Rev. E  and below;
0.5um for Rev. G.  Packaged in a 208-pin PQFP package

**W83628F/29D PCI TO ISA Bridge Set                                c98...
**W83626F/D   LPC TO ISA Bridge Set                                <00...
**
**Multi I/O:
**W83757          SUPER I/O  CHIP                                  <92...
**W83767F         ??           Multi I/O  [no datasheet]
**W83777F/87F     Power I/O   (Multi I/O)                          <95...
**W83877F         WINBOND I/O (Multi I/O)                          <96...
**W83877TF/TG/TD  WINBOND I/O (Multi I/O)                          c97...
**W83977F/G/AF/AG WINBOND I/O (Multi I/O)                          c97...
**W83977TF        WINBOND I/O (Multi I/O)                          c97...
**W83977EF        WINBOND I/O (Multi I/O)                          <98...
**W83977ATF       WINBOND I/O (Multi I/O)                          <98...
**
**Disk Controller:
**W83759/A/F/AF   Advanced VL-IDE Disk Controller                  <96...
**W83769          Local Bus IDE Solution                           <94...
**
**UARTS:
**W86C250A  UART (equivalent of INS8C250A) [no datasheet]
**W86C450/P Universal Asynchronous Receiver/Transmitter         <Jul89...
**W86C451   I/O controller for IBM PC/AT/XT                     <Jul89...
**W86C452   I/O controller for IBM PC/AT                         Jul89...
**W86C456   I/O controller [no datasheet]                            ?
**W860551/P UART with FIFO and Printer Port Controller             <94...
**
**Other:...
*ZyMOS...
*General Sources:...

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