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**82489DX       Advanced Programmable Interrupt Controller    10/12/92
***Notes:...
***Info:
1.0 INTRODUCTION

The  82489DX  Advanced   Programmable  Interrupt  Controller  provides
multiprocessor interrupt management, providing both static and dynamic
symmetrical interrupt distribution across all processors.

The main  function of the  82489DX is to provide  interrupt management
across all  processors. This  dynamic interrupt  distribution includes
routing of the interrupt to the lowest-priority processor. The 82489DX
works in  systems with multiple  I/O subsystems, where  each subsystem
can  have  its  own  set  of  interrupts.   This  chip  also  provides
inter-processor interrupts,  allowing any  processor to  interrupt any
processor or set  of processor. Each 82489DX I/O  init interrupt input
pin is individually  programmable by software as either  edge or level
triggered.  The interrupt vector and interrupt steering information an
be specified  per pin.  A  32-bit wide timer  is provided that  can be
programmed to interrupt the local processor.  the timer can be used as
a counter to provide a time base to software running on the processor,
or to generate  time slice interrupts locally to  that processor.  the
82489DX   provides   32-bit   software    access   to   its   internal
registers. Since no  82489DX register read have any  side effects, the
82489DX registers  can be aliased  to a  user read-only page  for fast
user access (e.g., performance monitoring timers).

The 82489DX  supports a generalized naming/addressing  scheme that can
be tailored by  software to fit a variety of  system architectures and
usage  models.   It  also  supports 8259A  compatibility  by  becoming
virtually  transparent with  regard to  an externally  connected 8259A
style controller, making the 8259A visible to software.

***Versions:...
***Features:...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
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**5595       Pentium PCI System I/O                          <12/24/97
***Notes:...
***Info:...
***Versions:...
***Features:...
**950        LPC I/O                                         <07/16/99...
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*Western Digital...
**WD76C20x   Floppy, RTC, IDE and Support Logic Device       <11/25/91
***Info:
GENERAL DESCRIPTION

The  WD76C20 is  a member  of  the WD7600  chip set  which provides  a
cost-effective,  power-efficient   solution  to  PC   systems  design,
especially those  relating to "lap-top" devices. The  set includes the
WD76C10, the WD76C20, and the WD76C30 as shown in Figure 1-1. Together
these chips  provide all necessary  logic to build a  fully integrated
system board for several  varieties of IBM PC/AT compatibles including
systems using 80286, 80386SX, and 80C286 processors.

As  part  of  this  chip  set, the  WD76C20  provides  these  integral
functions:
o Bus Interface Logic
o IDE Interface
o Chip Select Logic
o Floppy Disk Controller
o Real Time Clock
o Suspend/Resume Logic

The Floppy  Disk Controller (FDC) component  provides necessary timing
and signalling between the host  processor peripheral bus and a floppy
disk drive through a cable connector.

The Real Time Clock  component provides calendar and clock information
for the system.

The IDE Interface  controls buffering between the system's  AT Bus and
PC/AT compatible IDE drive interface.

The  Bus  Interface  Logic  controls  buffering of  data  between  the
system's AT Bus and the WD76C20.

The  Chip Select  Logic section  provides decoding  for  selected chip
functions both within the WD76C20 and on the PC/AT motherboard.

Suspend/Resume  Logic provides  support  for chip  set power-down  and
resume sequences.

***Versions:...
***Features:...
**WD76C30x   Perip. Ctrl, Interrupt Multiplex, and Clock Gen <11/18/91...
**WD7615     Desktop Buffer Manager                          <04/15/92...
**WD7625     Desktop Buffer Manager                          <10/01/92...
**WD8120LV   Super I/O [no datasheet]                                ?
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