[Home] [This version is outdated, a new version is here]
*Title...
*Search:...
*Read Me/FAQ/General Info...
*_IBM...
*ACC Micro...
*ALD...
*ALi...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**????? (Profusion) c:99
Chips:
Memory Access Controller (MAC)
Data Interface Buffer (DIB)
CPUs: 8x P-III Xeon Oct
DRAM Types: SDRAM PC100 2-way Interleave dual channel
Max Mem: 32GB
ECC/Parity: ECC
AGP speed: N/A
Bus Speed: 100
PCI Clock/Bus: 1/3 PCI-66/64
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
**Other chips:
***Video:...
***Disk:...
***Peripheral:...
***Other:...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
**WD8110 System controller for 80386DX/486 <11/30/93
***Notes:...
***Info:
1.0 INTRODUCTION
The WD8110/LV System Controllers are designed to provide a high
performance, single chip system controller supporting all 80486SX,
80486DX. 80386SX and 80386DX CPUs in AT bus based Desktop/
Laptop/Notebook/Pen-based systems.
1.1 DOCUMENT SCOPE
This document describes the function and operation of the WD8110/LV
System Controller devices. It includes the description of external
logic necessary for efficient use of these devices. The WD8110/LV is
also referred to in this document as the System Controller.
1.3 WD8110/LV POWER MANAGEMENT
Power Management Control (PMC) is used for powering down the processor
or peripherals and includes processor stop clock, slow clock, auto-
matic processor clock speed switching modes and CAS before RAS slow
refresh. Suspend and resume is supported and low power DRAM is
refreshed while the processor and other power consuming devices are
turned off. The power drain for the core logic and VGA controller is
less than 2 mA in this mode. Power and clock speed may be controlled
by the Keyboard Controller. transparently to the 80386 or 80486.
The System Activity Monitor (SAM) is a transparent feature that
replaces the functions previously performed by software. It senses
when the system has been idle for a previously programmed period at
time and determines a clean break point in which to perform power down
activities such as suspend.
The system controller also supports System Management Interrupt (SMI)
with complete I/O trapping of up to six separate I/O ranges. Each
range has an independent timer which can generate an SMI after a
programmed period of time during which there was no I/0 access to that
range.
1.3.1 Desktop Applications
The WD8110/LV provides a high performance solution with a flexible
memory controller architecture. including support for five banks of
memory. The WD8110/LV can fully support an external look-aside cache
or a combination primary and secondary cache. This feature makes it
particularly suitable for use with cached microprocessors where it
maintains cache coherency via its built-in bus snooping capability. In
addition. the WD8110/LV supports Video Local Bus Interface (VLBI) for
enhanced graphics performance.
The built-in power management features of the WD8110/LV allows a high
performance yet power efficient desk top solution.
1.3.2 Portable Applications
The WD8110LV is an ideal choice because of its advanced power
management features and power saving 3.3 volt operation, which
delivers long battery life in a compact footprint. This makes it a
perfect choice for laptop, notebook, pen-based and palmtop computers.
The five bank memory controller on the WD8110LV provides the user with
great flexibility in the selection of 3.3 volt DRAMs to meet system
memory requirements in low voltage platforms. The WD8110LV memory
controller supports JEDEC standard 3.3 volt DRAM in various
configurations, including the JEIDA standard 88-pin DRAM card.
The WD8ll0/LV can be paired with the appropriate support devices from
Western Digital to deliver the most efficient solution for any
platform. For 5 volt desktop or portable platforms, the WD8l10/LV can
be used with the WD76C20 Peripheral Controller and the WD76C30 I/O
Controller. The WD8110 may also be used with the WD7615 Buffer Manager
device and a generic Super I/O chip to implement a low cost desktop
platform. For 3.3 volt applications, the WD8110LV can be used with the
WD76C20ALV and WD76C30ALV, both of which incorporate level translators
(split rail operation). For subnotebook and palmtop type applications,
WD7625LV buffer manager and WD8120LV Super I/O can be added to the
WD8110LV based solution to achieve a very compact footprint.
The WD8110/LV is a fifth generation system controller device derived
from core chips with proven compatibility and design maturity in
several of the industry's leading desktop and portable platforms.
Designed with the state of the art 0.9 micron high performance CMOS
process. the WD8110/LV family maintains architectural compatibility
with Western Digital's WD7600 and WD7855 systems logic chip sets while
incorporating many additional performance enhancements.
***Configurations:...
***Features:
o Interfaces with 80486SX, 80486SXLP, 80486DX, 80386SX and 80386DX
CPU's
o Operates at up to 33 MHz at 3.3 volts or 5 volts with the
80486SX/DX
o Operates at up to 33 MHz with the 80386SX/DX
o Supports single and double clock 80486SX/DX and Intel SL Enhanced
processors.
DRAM control:
o Page Mode word interleaved, DRAM controller with support for 80486
burst mode.
o Supports 3-2-2-2 clock sequence, 9 CLKs with 16-byte line fill for
a page hit DRAM read cycle at 33 MHz.
o Optional 3-1-1-1 clock sequence, 6 CLKs with 16-byte line fill for
static column mode DRAMs at CPU speeds of 16 MHz and 20 MHz
o Zero Wait State writes at 16 MHz and 20 MHz to DRAMS for
80486SX/DX
o One Wait State writes to DRAMs for 80386SX/DX
o One Wait State reads from DRAMs for Page Hit access for 80386SX/DX
o Supports memory in five DRAM banks for a maximum of 256 Mbytes,
using 256Kbit, 1 Mbit, 4 Mbit and 16 Mbit DRAMs and special DRAMs
such as 512K by 9, 1M by 18 and 2M by 9.
o Supports major DRAM standards, including Asymmetrical DRAMs Static
Column DRAMs and 88-pin DRAM cards.
o Self-adjusting output drivers minimize output rise/fall time
variations and reduce EMI and ground noise.
o DRAM address multiplexer capable of driving 450 pF with adjustable
strength drivers.
o Features CAS before RAS refresh and slow refresh for low power.
o Supports slow refresh and self refresh DRAMs at 120 us.
o I/O mapping for board testability
o 32-bit direct interface with internal parity generation and
checking with no DRAM data buffers required.
Power Management:
o Low power 0.9 micron CMOS technology
o Provides power control with suspend and resume mode operations.
o 3 volt suspend to hard disk and Hibernation.
o Sleep Mode provides:
- Stop clock for static CPU for power saving.
- Processor power down.
o Provides automatic processor clock switching for 80386.
o Automatic CPU speedup (AutoFast).
- Clock Scaling
- Clock Throttling
o Supports multiple CPU speeds.
o Supports System Management Interrupt (SMI) for efficient power
management.
o Provides peripheral and I/O power control with trapping on I/O
address ranges for SMI operations.
o Supports a fully programmable 16-bit decode.
o Provides System Activity Monitor (SAM) for power management.
o Stop DMA clock.
o 3.3V low voltage operation with on-chip translators for 5 volt AT
bus
(split rail operation).
o 3 volt and 5 volt mixed mode.
Chip Set Features:
o High speed DMA.
o Three fully programmable chip selects with PMC timers.
o Built in Immunizer for virus protection.
o Connects directly to the AT Data Bus SD(15:00).
o Supports a Video Local Bus Interface (VLBI) for a 32-bit Video
Graphic Array (VGA) interface.
o Bank switched BIOS ROM up to 512 KB.
**
**Support Chips:
**WD76C20x Floppy, RTC, IDE and Support Logic Device <11/25/91...
**WD76C30x Perip. Ctrl, Interrupt Multiplex, and Clock Gen <11/18/91...
**WD7615 Desktop Buffer Manager <04/15/92...
**WD7625 Desktop Buffer Manager <10/01/92...
**WD8120LV Super I/O [no datasheet] ?
**Other Chips:...
*Winbond...
*ZyMOS...
*General Sources:...
(c) Copyright mR_Slugs Warehouse - All rights Reserved