[Home] [This version is outdated, a new version is here]
*Title...
*Search:...
*Read Me/FAQ/General Info...
*_IBM...
*ACC Micro...
*ALD...
*ALi...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**?????  (Profusion)    c:99
Chips:         
Memory Access Controller (MAC)  
Data Interface Buffer (DIB)
CPUs:          8x P-III Xeon Oct
DRAM Types:    SDRAM PC100 2-way Interleave dual channel
Max Mem:       32GB
ECC/Parity:    ECC
AGP speed:     N/A
Bus Speed:     100
PCI Clock/Bus: 1/3 PCI-66/64



**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
**5591/5592/5595 (David)   Pentium PCI A.G.P. Chipset        <01/09/98
***Info:
The SiS5591/5592  SiS5595 glueless P5  A.G.P. chipset provides  a high
performance/cost index  Desktop/Mobile solution for  the Intel Pentium
P54C/P55C, AMD K5/K6, and Cyrix M1/M2 A.G.P. system.

The SiS5591/SiS5592  A.G.P./PCI controller integrated  the Host-to-PCI
bridge, the L2 cache  controller, the DRAM controller, the Accelerated
Graphics  Port interface,  and the  PCI IDE  controller. The  L2 cache
controller can  support up to 1  M P.B. SRAM, and  the DRAM controller
can  support EDO/FP/SDRAM memory  up to  768 MB  with optional  ECC or
parity check  function. The  A.G.P. 1.0 compliance  interface supports
both  1X, and  2X speed  mode with  sideband address  capability.  The
built-in fast  PCI IDE  controller supports the  ATA PIO/DMA,  and the
Ultra DMA/33 functionality.

SiS5591  and SiS5592  have some  pin-out switching  to  facilitate the
main-board layout.  SiS5591 pin  assignment is based  on the  ATX form
factor,  and  SiS5592  pin  assignment   is  based  on  the  NLX  form
factor. Beside  the pin-out switching, SiS5591 and  SiS5592 is totally
the same on the internal logic circuit.

The SiS5595 PCI  system I/O integrates the PCI-to-ISA  bridge with the
DDMA,  and  Serial  IRQ  capability,  the ACPI/Legacy  PMU,  the  Data
Acquisition  Interface, the Universal  Serial Bus  host/hub interface,
and the ISA  bus interface which contains the  ISA bus controller, the
DMA controllers,  the interrupt controllers,  and the Timers.  It also
integrates the Keyboard controller, and the Real Time Clock (RTC). The
built-in USB controller,  which is fully compliant to  OHCI (Open Host
Controller  Interface),  provides two  USB  ports  capable of  running
full/low speed USB devices.  The Data Acquisition Interface offers the
ability of monitoring and reporting the environmental condition of the
PC. It could  monitor 4 positive analogue voltage  inputs, 2 Fan speed
inputs, and one temperature input.


***Configurations:...
***Features:...
**5596/5513      (Genesis) Pentium PCI Chipset               <03/26/96...
**5597/5598      (Jedi)    Pentium PCI/ISA Chipset           <04/15/97...
**530/5595       (Sinbad) Host, PCI, 3D Graphics & Mem. Ctrl.<11/10/98...
**540            (Spartan) Super7 2D/3D Ultra-AGP Single C.S.<11/30/99...
**55x            SoC (System-on-chip)                        <03/14/02...
**
**Support chips:
**85C206     Integrated Peripheral Controller [no datasheet]         ?...
**5595       Pentium PCI System I/O                          <12/24/97...
**950        LPC I/O                                         <07/16/99...
**Other:...
**PII/III/Pro...
**Athlon etc...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
**WD7855        System controller for 80386SX                <09/25/92
***Notes:...
***Info:
1.3 GENERAL DESCRIPTION

Western  Digital's  WD7855/LV single  chip  ISA  System Controller  is
designed   for  high-performance   IBM  PC/AT   compatible  platforms.
Available for desktop, portable  or low voltage (LV) applications, the
WD7855/LV supports  the 803868X microprocessor operating  at speeds up
to 33 MHz.

The  WD7855/LV incorporates  seven high-performance  system controller
functions which include the ISA bus interface, CPU interface, flexible
memory  controller, DMA controller,  interrupt controller,  timers and
advanced  power  management.  In  combination  with Western  Digital’s
support devices, the WD7855/LV provides a highly flexible and powerful
desktop or portable platform design.

The  WD7855/LV is  designed to  work  with all  variations of  80386SX
compatible microprocessors.  It supports the  traditional dynamic CPUs
with  the industry's  only  Processor Power-down  feature to  minimize
power consumption. The WD7855/LV fully supports static microprocessors
such  as the  AMD  Am386SXL  with CPU  Stop  Clock, System  Management
Interrupt  and  I/O  trapping  features.  The  WD7855/LV  incorporates
special circuitry  which allows  for optimizing the  cache performance
and maintaining  cache coherency  with cached CPUs  such as  the Cyrix
Cx4868LC.

1.3.1 Desktop Applications
The WD7855 provides a high performance solution with a flexible memory
controller architecture, including support  for eight banks of two way
interleave  memory and  EMS  4.0 hardware.   The  WD7855/LV can  fully
support  an external  look-aside cache  or a  combination  primary and
secondary cache.  This feature makes it particularly  suitable for use
with cached microprocessors such  as Cyrix Cx486SLC where it maintains
cache coherency via its built-in bus snooping capability. In addition,
the WD7855/LV  supports Video Local Bus Interface  (VLBI) for enhanced
graphics performance.

1.3.2 Portable Applications
The  WD7855LV  is  an  ideal  choice because  of  its  advanced  power
management features and power saving 3.3 volt operation which delivers
long  battery life in  a compact  footprint. This  makes it  a perfect
choice for laptop, notebook, pen based and palmtop computers.

The eight  bank memory  controller on the  WD7855LV provides  the user
with  great flexibility in  the selection  of 3.3  volt DRAMs  to meet
system  memory requirements  in low  voltage platforms.   The WD7855LV
memory  controller supports JEDEC  standard 3.3  volt DRAM  in various
configurations, including the JEIDA standard 88-pin DRAM card.

The WD7855/LV can be paired  with the appropriate support devices from
Western  Digital  to  deliver  the  most efficient  solution  for  any
platform.  For 5 volt desktop  or portable platforms, the WD7855LV can
be used  with the  WD76C20 Peripheral Controller  and the  WD76C30 I/O
Controller.   Alternatively, the WD7855  can be  used with  the WD7615
Buffer Manager device and a generic  Super I/O chip to implement a low
cost desktop platform. For 3.3  volt applications, the WD7855LV can be
used  with the WD76C20ALV  and WD76C30ALV,  both of  which incorporate
level translators (split rail  operation). For subnotebook and palmtop
type  applications,  WD7625LV  buffer  manager  can be  added  to  the
WD7855LV based solution to achieve a very compact footprint.

The WD7855/LV is a  fourth generation system controller device derived
from  core chips  with  proven compatibility  and  design maturity  in
several  of the  industry’s  leading desktop  and portable  platforms.
Designed with  the state of the  art 0.9 micron  high performance CMOS
process,  the WD7855/LV  family maintains  architectural compatibility
with Western Digital's WD7600 and WD7700 systems logic chip sets while
incorporating many additional performance enhancements.

***Configurations:...
***Features:...
**WD7900/LP/LV  System Chip Set for 80286 or 80386SX (Cache) <11/25/91...
**WD8110        System controller for 80386DX/486            <11/30/93...
**
**Support Chips:
**WD76C20x   Floppy, RTC, IDE and Support Logic Device       <11/25/91...
**WD76C30x   Perip. Ctrl, Interrupt Multiplex, and Clock Gen <11/18/91...
**WD7615     Desktop Buffer Manager                          <04/15/92...
**WD7625     Desktop Buffer Manager                          <10/01/92...
**WD8120LV   Super I/O [no datasheet]                                ?
**Other Chips:...
*Winbond...
*ZyMOS...
*General Sources:...

(c) Copyright mR_Slugs Warehouse - All rights Reserved