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**M6117 386SX Single Chip PC <97
***Notes:...
***Info:
The M6117D is a highly integrated, low voltage, single-chip
implementation of Intel 386SX compatible microprocessor plus ALi
M1217B chipset. The M6117D provides the following functions : 1)
Intel 386SX core 2) Supports EDO DRAM controller including FP mode 3)
Coprocessor Interface 4) ISA interface 5) Peripheral Interface
(includes two cascaded 8237 DMA controllers, a 74612 memory mapper, 2
cascaded 8259 interrupt controller, and an 8254 programmer counter 6)
Built-in RTC 7) Programmable 2 channels chip select 8) Built-in PS2
Keyboard Controller and Mouse 9) Built-in WATCHDOG timer 10) 16-bits
GPI/O via SD bus and 16-bits independent GPIO 11) IDE interface.
***Versions:...
***Features:
o Static Intel 386SX compatible Core
- Operating Power Supply 5.0V
- Operating frequency 25Mhz to 40Mhz
o Memory Controller
- Supports EDO DRAM
- Supports on board memory size up to 16M bytes for 386SX or 64M
bytes upgrade system using 256K, 512K, 1M, 4M or 16M SIMMs
- Supports up to 4-bank DRAM interface
- Page interleave DRAM access for FP mode
- Programmable shadow RAM from A to B segment in 128K byte and C
to F segment in 32K byte unit
- Provides "RAS only" refresh or "CAS before RAS” refresh types
- Parity generation and checking
o Peripheral Interface
- Includes 2 cascaded 8237 DMA controllers
- Includes 1 74612 memory mapper
- Includes 2 cascaded 8259 interrupt controllers
- Includes 1 8254 programming counter
o ISA Interface
- Executes cycles for requests from CPU, DMA and ISA bus master
- Assembles or de-assembles data for multiple bus cycle or
unmatched data width
- Generates refresh signals to ISA slots during DRAM refresh
cycles
o Built-in RTC
- Internal Real Time Clock that provides 128 byte CMOS RAM
o Programmable 2 channels chip select
- Provide chip select for memory or I/O device without external
address decode random logic
o Built-In PS2/AT Keyboard Controller
- Internal PS2/AT keyboard controller and mouse
o PMU interface
- Supports CPU SMM mode, SMI feature
- Supports APM control
- Provides External Suspend mode switch
- Provides four (4) system states for power saving (On, Doze,
Standby, Suspend)
- Supports RTC alarm wake up control
o Expandable GPI/O signals
- Provides sixteen External power control input and output signals
- Provides sixteen independent pin for general purpose input and
output signals
o Watchdog timer
- When timer times out , a system reset or NMI or IRQ happens
o IDE interface
- Provides a decoder for external IDE connection
o Packaging
- 208-pin PQFP package
**
**Support Chips:
**M1535/D South Bridge ?...
**
**May not exist:...
**Later Chipsets:...
**Other:...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**????? (Profusion) c:99
Chips:
Memory Access Controller (MAC)
Data Interface Buffer (DIB)
CPUs: 8x P-III Xeon Oct
DRAM Types: SDRAM PC100 2-way Interleave dual channel
Max Mem: 32GB
ECC/Parity: ECC
AGP speed: N/A
Bus Speed: 100
PCI Clock/Bus: 1/3 PCI-66/64
**800 series...
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*TI (Texas Instruments)...
**SN74LS610/2 IBM AT: SN74LS610, SN74LS612 Memory Mappers <84
***Notes:...
***Info:...
***Versions:...
***Features:...
**TACT82000 3-Chip 286 [no datasheet] c89...
**TACT82411 Snake Single-Chip AT Controller c90...
**TACT82S411 Snake+ Single-Chip AT Controller [no datasheet] c91...
**TACT83000 AT 'Tiger' Chip Set (386) c89...
**TACT84500 AT Chip Set (486, EISA) [no datasheet, some info] c91...
**Other:...
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