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**M1511/12/13 Aladdin II (Pentium) [no datasheet, some info] >Apr95
***Notes:
According to:
https://www.thefreelibrary.com/ALi+Announces+Latest+Aladdin+Family+Entry+New+Core+Logic+Chip+Set+for...-a016766656
" SAN JOSE, Calif.--(BUSINESS WIRE)--April 4, 1995--Acer Laboratories
Inc. (ALi) today introduced its newest Aladdin core logic chip set for
Pentium-class personal computers.
This chip set - the M1511/M1513/M1512 - provides high-performance
along with the highest level of integrated functions, allowing design
of significantly cost-reduced, high-performance system boards. The new
Aladdin chip set supports the Intel Pentium family up to 150 MHz, as
well as all future higher speed Pentium versions; the AMD K5; and the
Cyrix M1 including linear mode addressing support.
This new chip set in ALi's Aladdin Family includes the M1511 Memory,
Cache, Buffer controller, the M1513 SIO Controller and two M1512 data
buffers. The chip set provides cache flexibility supporting Pipelined
Burst, Burst and Standard SRAMs; up to 1MB cache. High performance EDO
DRAM or DRAM can be used up to 768MB in six banks. Bus Mastered IDE
and a Keyboard Controller are integrated, reducing parts count on the
system board. APIC is also integrated to allow for dual-Pentium system
design, and plug & play features are included for multimedia
platforms.
"The Aladdin chip set family is targeted at the mainstream PC market
which is driven by high performance and cost," said Dr. S. J. Lee, ALi
Vice President of Technology. "This second generation Aladdin provides
the additional integrated functions and higher performance levels
which together help system manufacturers meet the performance and the
required cost levels to compete profitably in the increasingly
competitive Pentium system market."
Pricing and Availability
All devices are manufactured in a 0.6-micron CMOS process. The M1511
and 1513 are packaged in 208-pin PQFPs and the M1512s are packaged in
100-pin PQFPs. The chip set will be sampling in April and is priced at
$22.00 in volume quantities.
"
***Configurations:...
**M1521/23 Aladdin III 50-66MHz <Nov96...
**M1531/33/43 Aladdin IV & IV+ 50-83.3MHz <05/28/97...
**M1541/42/33/43 Aladdin V & V+ 50-100MHz ?...
**M1561/43/35D Aladdin 7 ArtX [no datasheet, some info] 11/08/99...
**M6117 386SX Single Chip PC <97
***Notes:...
***Info:...
***Versions:...
***Features:
o Static Intel 386SX compatible Core
- Operating Power Supply 5.0V
- Operating frequency 25Mhz to 40Mhz
o Memory Controller
- Supports EDO DRAM
- Supports on board memory size up to 16M bytes for 386SX or 64M
bytes upgrade system using 256K, 512K, 1M, 4M or 16M SIMMs
- Supports up to 4-bank DRAM interface
- Page interleave DRAM access for FP mode
- Programmable shadow RAM from A to B segment in 128K byte and C
to F segment in 32K byte unit
- Provides "RAS only" refresh or "CAS before RAS” refresh types
- Parity generation and checking
o Peripheral Interface
- Includes 2 cascaded 8237 DMA controllers
- Includes 1 74612 memory mapper
- Includes 2 cascaded 8259 interrupt controllers
- Includes 1 8254 programming counter
o ISA Interface
- Executes cycles for requests from CPU, DMA and ISA bus master
- Assembles or de-assembles data for multiple bus cycle or
unmatched data width
- Generates refresh signals to ISA slots during DRAM refresh
cycles
o Built-in RTC
- Internal Real Time Clock that provides 128 byte CMOS RAM
o Programmable 2 channels chip select
- Provide chip select for memory or I/O device without external
address decode random logic
o Built-In PS2/AT Keyboard Controller
- Internal PS2/AT keyboard controller and mouse
o PMU interface
- Supports CPU SMM mode, SMI feature
- Supports APM control
- Provides External Suspend mode switch
- Provides four (4) system states for power saving (On, Doze,
Standby, Suspend)
- Supports RTC alarm wake up control
o Expandable GPI/O signals
- Provides sixteen External power control input and output signals
- Provides sixteen independent pin for general purpose input and
output signals
o Watchdog timer
- When timer times out , a system reset or NMI or IRQ happens
o IDE interface
- Provides a decoder for external IDE connection
o Packaging
- 208-pin PQFP package
**
**Support Chips:
**M1535/D South Bridge ?...
**
**May not exist:...
**Later Chipsets:...
**Other:...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82395SX Smart Cache 12/17/90
***Notes:...
**82396SX Smart Cache 12/17/90...
**82485 Turbo Cache (and 485Turbocache) c90...
**82489DX Advanced Programmable Interrupt Controller 10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
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