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**82489DX Advanced Programmable Interrupt Controller 10/12/92
***Notes:...
***Info:
1.0 INTRODUCTION
The 82489DX Advanced Programmable Interrupt Controller provides
multiprocessor interrupt management, providing both static and dynamic
symmetrical interrupt distribution across all processors.
The main function of the 82489DX is to provide interrupt management
across all processors. This dynamic interrupt distribution includes
routing of the interrupt to the lowest-priority processor. The 82489DX
works in systems with multiple I/O subsystems, where each subsystem
can have its own set of interrupts. This chip also provides
inter-processor interrupts, allowing any processor to interrupt any
processor or set of processor. Each 82489DX I/O init interrupt input
pin is individually programmable by software as either edge or level
triggered. The interrupt vector and interrupt steering information an
be specified per pin. A 32-bit wide timer is provided that can be
programmed to interrupt the local processor. the timer can be used as
a counter to provide a time base to software running on the processor,
or to generate time slice interrupts locally to that processor. the
82489DX provides 32-bit software access to its internal
registers. Since no 82489DX register read have any side effects, the
82489DX registers can be aliased to a user read-only page for fast
user access (e.g., performance monitoring timers).
The 82489DX supports a generalized naming/addressing scheme that can
be tailored by software to fit a variety of system architectures and
usage models. It also supports 8259A compatibility by becoming
virtually transparent with regard to an externally connected 8259A
style controller, making the 8259A visible to software.
***Versions:...
***Features:...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
**5595 Pentium PCI System I/O <12/24/97
***Notes:...
***Info:...
***Versions:...
***Features:...
**950 LPC I/O <07/16/99...
**Other:...
**PII/III/Pro...
**Athlon etc...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
**SL9090/A Universal PC/AT Clock Chip <oct88
***Info:
The SL9090 is a Universal Clock Chip capable of generating all
essential clock signals that are used in a typical P.C. design. This
device can support 8086, 8088, 80286, 803865X, 80386DX and 80486
microprocessor based designs. The outputs of this clock chip are
programmable through the keyboard and also by jumper settings. Clock
options of 60 MHz, 50 MHz, 48 MHz, 40 MHz, 32 MHz and their multiples
are available, in order to give flexibility to the user.
Frequency selection is done by the three decode inputs FS0-FS2 as
shown in Table 1. [see datasheet] FSEL is used to control the system
I/O bus clock. During a CPU cycle the FSEL remains high, and the
frequency selection on the outputs is determined by the FS0-FS2
pins. When an I / O cycle is detected, the FSEL goes low and fixed
frequencies of 16 MHz, 8 MHz and 4 MHz are available on output pins
F12 (pin 8), F122 (pin 5) and F124 (pin 3). Designer have an option to
run the system I/O clock at half the CPU clock as well. This is
achieved by connecting the FSEL pin to the keyboard controller in
order to hold this pin high during an I/O cycle. This allows the FSEL
signal to be controlled through the keyboard by pressing CTL ALT +" or
"CTL ALT-".
The reference frequency of 14.318 MHz is also supplied to the output
through the FREF pin for the I/O slots. This frequency is divided by 2
internally and 7.159 MHz is supplied to the output through the FREF2
pin for the keyboard controller. The FREF12 pin has an output of 1.19
MHz and is used by the timerl (8254) in the peripheral controller for
refresh. All outputs are capable of 8mA drive.
The SL9090 consists of two independent Voltage controlled Oscillators
(VCOs) integrated with dividers, phase sensitive detectors, charge
pumps and buffer amplifiers to provide the desired glitch free
frequencies. An externally generated signal of 14.318 MHz is used as
the reference frequency for the SL9090. This reference frequency is
fed into the phase sensitive detectors to differentiate the difference
in phase between the reference frequency being generated by the
VCOs. This becomes an input to the charge pumps which in turn
generates a signal to sink or source the charge. This signal is
buffered by the buffer amplifiers between the charge pumps and the
VCOs. The output from the VCOs are divided to generate the appropriate
outputs.
The SL9090 is designed, using advanced Bipolar technology and is
available in a 44 pin PLCC. It requires only one crystal (14.3 MHz)
and a few RC components to generate all the essential clocks that are
required for a PC. design. As there is only one crystal on the system
board, the Electro Magnetic Radiation is reduced significantly
facilitating FCC approval. This makes the SL9090 an ideal low cost
solution with capabilities for universal applications.
***Versions:...
***Features:...
**SL9095 Power Management Unit ?...
**SL9151 80286 Page Interleave Memory Controller (16-25MHz) ?...
**SL9250 80386SX Page Mode Memory Controller (16/20MHz 8MB) ?...
**SL9251 80386SX Page Interleave Memory Controller <04/13/90...
**SL9252 80386SX System and Memory Controller <06/12/90...
**SL9350 80386DX Page Mode Memory Controller (16-25MHz 16MB) ?...
**SL9351 80386DX Page Interleave Memory Controller (33MHz) ?...
**SL9352 80386DX System and Memory Controller <06/12/90...
**SLXXXX Other chips...
**
**VT82C470 "Jupiter", Chip Set (w/o cache) 386 [no datasheet] ?
**VT82C475 "Jupiter", Chip Set (w/cache) 386 [no datasheet] ?
**VT82C486/2/3 "GMC chipset" [no datasheet, some info] ?...
**VT82C495/480 "Venus" Chip Set [no datasheet] ?
**VT82C495/491 ? EISA Chip Set [no datasheet, some info] <93...
**VT82C496G Pluto, Green PC 80486 PCI/VL/ISA System <05/30/94...
**VT82C530MV 3.3V Pentium chipset [no datasheet, some info]<05/30/94...
**VT82C570M Apollo Master, Green Pentium/P54C <06/22/95...
**VT82C580VP Apollo VP, Pentium/M1/K5 PCI/ISA System <02/15/96...
**VT82C580VPX Apollo VPX, VPX/97, Pentium with 66/75MHz Bus <01/09/97...
**VT82C590 Apollo VP2, VP2/97, Single-Chip Pentium 66MHz <01/10/97...
**VT82C597/AT Apollo VP3, Single-Chip for Pentium with AGP <10/03/97...
**VT82C598MVP Apollo MVP3,Single-Chip 66/75/83/100MHz & AGP <09/22/97...
**VT8501 Apollo MVP4,Single-Chip 66-100MHz & AGP <11/04/98...
**VT82C680 Apollo P6, Pentium-Pro Chip Set <08/30/96...
**Support chips:
**VT82C505 Pentium/486 VL to PCI Bridge <05/30/94...
**VT82C586/A/B PCI Integrated Peripheral Controller <10/13/96...
**VT82C596/A Mobile PCI Integrated Peripheral Controller <11/05/97...
**VT82C686A/B PCI Super-I/O Integrated Peripheral Ctrl. <02/10/98...
**Later P-Pro/II/III/Celeron...
**Later AMD...
**Other...
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