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**M1489/87       FinALi-486 PCI Chipset                         <Feb95
***Info:
ALi's M1489/M1487 PCI chipset is  the most cost effective PCI solution
available. M1489/M1487  enables top-to-bottom PCI in  486 CPU systems,
offering superior price/performance for mainstream PCI-ISA systems.

M1489/M1487 highly  integrates the DRAM controller,  L2 cache control-
ler,  Host,  PCI, and  ISA  interface, as  well  as  the standard  ISA
functions:  DMA controller,  interrupt controller,  timer/counter, RTC
(Real Time Clock),  and keyboard controller. Additionally, M1489/M1487
incorporates the high performance Local  Bus IDE allowing a system de-
signer to implement Local bus IDE with no additional cost. M1489/M1487
is a  highly integrated  solution requiring minimized  TTL components,
enabling PCI-ISA designs at costs equal to or lower than comparable VL
Bus designs.

M1489 (Cache Memory PCI Controller:  CMP) integrates the L2 cache con-
troller  and  the  DRAM  controller.  The  cache  controller  supports
write-back cache  policies and cache size  from 128K to 1M  byte in an
interleaved  or non-interleaved  configuration.   The DRAM  controller
interfaces DRAM  to the Host  bus, PCI bus,  and Link bus.   M1489 can
support   EDO  3/5V   DRAM,   standard  DRAM,   and  flexible   timing
select. M1489  also integrates  intelligent Host to  PCI, PCI  to Host
buffer  to achieve high  performance.  Also,  M1489 provides  the high
performance Local Bus IDE interface.

M1487 (ISA Bridge Controller: IBC) provides the bridge between the ISA
bus, PCI  bus, and Host bus.  IBC integrates the  common I/O functions
found in  today's ISA  based systems: a  seven channel DMA,  two 82C59
interrupt controllers,  8254 timer/ counter, deep  green function, and
control logic for NMI generation. IBC also has built-in 128 bytes RTC,
MC14069, KBC,  and 7406.   IBC also provides  the decode  for external
BIOS.

***Configurations:...
***Features:...
**M????          Genie, Quad Pentium  [no datasheet, some info]    c95...
**M1451/49       Aladdin    (Pentium) [no datasheet]                 ?...
**M1511/12/13    Aladdin II (Pentium) [no datasheet, some info] >Apr95...
**M1521/23       Aladdin III       50-66MHz                     <Nov96...
**M1531/33/43    Aladdin IV & IV+  50-83.3MHz                <05/28/97...
**M1541/42/33/43 Aladdin V & V+    50-100MHz                         ?...
**M1561/43/35D   Aladdin 7 ArtX    [no datasheet, some info]  11/08/99...
**M6117          386SX Single Chip PC                              <97...
**
**Support Chips:
**M1535/D        South Bridge                                        ?...
**
**May not exist:...
**Later Chipsets:...
**Other:...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82395SX     Smart Cache                                     12/17/90
***Notes:...
**82396SX     Smart Cache                                     12/17/90...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
**5595       Pentium PCI System I/O                          <12/24/97
***Notes:...
***Info:...
***Versions:...
***Features:
o   Integrated PCI-to-ISA Bridge
    − Translate s  PCI Bus Cycles into ISA Bus Cycles.   
    − Translate s ISA Master or DMA Cycles into PCI Bus Cycles.
    − Provide s a Dword Post Buffer for PCI to ISA Memory cycles.
    − Two 32 bit Prefetch/Post Buffers Enhance the DMA and ISA 
      Master Performance.
    − Fully Compliant to PCI 2.1.
o   Supports both Desktop and Mobile Advanced Power Management Logic
    − Meets ACPI 1.0 Requirements.
    − Supports Both ACPI and Legacy PMU.
    − Supports Suspend to RAM.
    − Supports Suspend to Hard Disk.
    − Optionally Tri−state ISA bus in low power state.
    − Supports Battery Management and LB/LLB/AC Indicator.
    − Supports CPU's SMM Mode Interface.
    − Supports CPU Stop Clock.
    − Supports Power Button of ACPI.
    − Supports three system timers and SMI# watchdog timer.
    − Supports Automatic Power Control.
    − Supports Modem Ring−in, RTC Alarm Wake up.
    − Supports Thermal Detection.
    − Supports GPIOs, and GPOs for External Devices Control.
    − Supports Programmable Chip Select.
    − Supports PCI Bus Power Management Interface Spec. 1.0
    − Supports Pentium II Sleep State.
o   Enhanced DMA Functions
    − 8-, 16- bit DMA Data Transfer.
    − Two 8237A Compatible DMA Controllers with Seven Independent
      Programmable Channels.
    − Provide the Readability of the two 8237 Associated Registers.
    − Support Distributed DMA.
    − Support PC/PCI DMA.
    − Per DMA channel programmable in legacy, DDMA or PC/PCI DMA mode
      operation.
o   Integrated Two 8259A Interrupt Controllers
    − 14 Independently Programmable Channels for Level-  or Edge-
      triggered Interrupts.
    − Provide the Readability of the two 8259A Associated Registers.
    − Support Serial IRQ.
    − Support the Reroutability for the PCI Interrupts.
o   Three  Programmable 16-bit Counters compatible with 8254
    − System Timer Interrupt.
    − Generate Refresh Request.
    − Speaker Tone Output.
    − Provide the Readability of the 8254 Associated Registers.
o   Integrated Keyboard Controller
    − Hardwired Logic Provides Instant Response.
    − Supports PS/2 Mouse Interface.
    − Supports Keyboard Password Security or Hot Key Power On 
      Function.
    − Supports Hot Key "Sleep" Function.
    − Programmable Enable and Disable for Keyboard Controller and 
      PS/2 Mouse.
o   Integrated Real Time Clock(RTC) with 256B CMOS SRAM
    − Supports ACPI Day of Month Alarm/Month  Alarm.
    − Supports various Power Up events, such as Button Up, Alarm Up, 
      Ring Up, GPIO5/PME0# Up, GPIO10/ PME1# Up, Password Security Up, 
      and Hotkey Up.
    − Supports various Power Down Events, like Software Power-down, 
      Button Power-down, and ACPI S3 Power-down.
    − Supports Power Supply ’98.
    − Provides RTC year 2000 solution.
o   Integrated Frequency Ratio Control Logic for Pentium II CPU
o   Universal Serial Bus Host Controller
    − Open HCI Host Controller with Root Hub.
    − Two USB Ports.
    − Supports Legacy Devices.
    − Supports Over Current Detection.
o   Integrated Hardware Monitor Logic
    − Up to 5 Positive Voltage Monitoring Inputs.
    − Two Fan Speed Monitoring Inputs.
    − One Temperature Sensings.
    − Supports thermister- or diode- temperature sensing for Pentium 
      II CPU.
    − Threshold Comparison of all Monitored  Values.
o   Supports I2C Serial Bus/ SMBUS 
o   Supports 2MB Flash ROM Interface
o   208  pins PQFP Package
o   5V CMOS Technology

**950        LPC I/O                                         <07/16/99...
**Other:...
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*TI (Texas Instruments)...
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