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**82395SX Smart Cache 12/17/90
***Notes:...
**82396SX Smart Cache 12/17/90...
**82485 Turbo Cache (and 485Turbocache) c90...
**82489DX Advanced Programmable Interrupt Controller 10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
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*Motorola...
*OPTi...
**82C291 SXWB PC/AT Chipset (386SX) c:91
***Info:
The OPTi SXWB provides a highly integrated solution for fully
compatible, high-performance PC/AT platforms. Since the chipset is so
critical to the performance and cost structure of a PC, this highly
integrated approach provides the foundation for a very cost effective
platform without compromising performance. Together with OPTi’s
82C206 Integrated Peripherals Controller (IPC), this silicon will
support the Intel/AMD 386SX and Cyrix CX486SLC microprocessors in the
most cost effective and power efficient designs available today. This
chipset offers optimum next generation performance for 386SX systems
running up to 33MHz. The OPTi SXWB solution provides the performance
benefits of a 32-bit programming architecture with the cost savings
associated with 16-bit hardware systems. The OPTi SXWB chipset
provides a solution positioned to deliver value, without neglecting
quality, compatibility, or reliability.
The 82C291 integrates a write-back cache controller, a local DRAM
controller, the CPU state machine, the AT bus state machine, and data
buffers all in a single 160-pin Plastic Quad Flat Pack (PQFP). On-chip
hardware provides the hooks for local bus device support.
***Configurations:...
***Features:...
**82C295 SLCWB PC/AT Chipset (386SX) ?...
**82C381/382 HiD/386 (386DX) c:89...
**82C391/392 386WB PC/AT Chipset (386DX) <Dec90...
**82C461/462 Notebook PC/AT chipset [no datasheet] ?...
**82c463 SCNB Single Ship Notebook c:92...
**82c465MV/A/B Single-Chip Mixed Voltage Notebook Solution <Oct97...
**82C481?/482? HiP/486 & HiB/486 [no datasheet] Oct89...
**82C491/392 486WB PC/AT Chipset <04/21/91...
**82C493/392 486SXWB <10/21/91...
**82C495SX/392SX LCWB PC/AT chipset [no datasheet] ?...
**82C495SLC DXSLC 386/486 Low Cost Write Back c:92...
**82C495XLC PC/AT Chip Set c:93...
**82c496A/B DXBB PC/AT Chipset <Mar92...
**82C496/7 DXBB PC/AT Chipset (Cached) <01/16/92
***Info:...
***Configurations:...
***Features:
o 386 and 486 CPU interface
o Isolates the CPU bus from Local bus, more reliable system
operation at high speed
o Asynchronous handshaking between CPU bus and Local bus; fixed
base-board speed with upgradeable CPU card speed
o Direct map write back cache with one level write buffer and
16-byte line size
o Programmable 2-1-1-1, 3-1-1-1, 2-2-2-2 or 3-2-2-2 burst read cycle
o Programmable cache write hit 0 or 0 wait state
o Optional Dirty bit
o Supports 32K - 256K cache size for 386 cache system
o Supports 64K - 512K cache size for 486 cache system
o Provides TAG and Dirty RAM test capability
o Built-in TAG auto-invalidation circuitry
o Two programmable non-cacheable regions
o Option for write-protected, cacheable Video BIOS
o Cacheable AT bus memory space
o 8042 emulation for fast CPU-reset and gate A20 generation
o 1X clock source support for systems from 16 MHZ to 50 MHZ
o 160-pin plastic quad flat package
**82C498 DXWB PC/AT chipset [no datasheet] ?...
**82C499 DXSC DX System Controller c:93...
**82C546/547 Python PTM3V c:94...
**82C556/7/8 Viper [no datasheet] ?...
**82C556/7/8N Viper-N Viper Notebook Chipset <05/25/95...
**82C556M/7M/8E Viper-N+ Viper Notebook Chipset c:96...
**82C566/7/8 Viper-Max Chipset Scalable MultiMedia PC Solution ?...
**82C571/572 486/Pentium c:93...
**82C576/7/8 Viper Xpress [no datasheet] ?...
**82C576/8/9 Viper XPress+ [no datasheet, some info] <01/16/97...
**82C596/597 PTMAWB Pentium Adaptive Write-back (Cobra) c:93...
**82C650/1/2 Discovery (Pentium Pro) [no datasheet] ?...
**82C681/2/6/7 386/486WB EISA c:92...
**82C683 386/486AWB EISA [no datasheet] ?...
**82C693/6/7 Pentium uP Write Back Cache EISA c:93...
**82C700 FireStar c:97...
**82C701 FireStar Plus c:97...
**82C750 Vendetta [no datasheet] ?...
**82c801 SCWB2 DX Single Chip Solution c:92...
**82C802 SCWB2 PC/AT Single Chip [no datasheet] ?...
**82C802G/GP System/Power Management Controller (cached) c:93...
**82C895 System/Power Management Controller (cached) c:Sep94...
**82C898 System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2 Buffer Devices <Nov94...
**82C822 PCIB (VLB-to-PCI bridge) c:94...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
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