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**82489DX       Advanced Programmable Interrupt Controller    10/12/92
***Notes:...
***Info:...
***Versions:...
***Features:...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94
***Notes:...
***Info:
The 82498 Cache Controller and multiple 82493 Cache SRAMs combine with
the Pentium processor (735/90,  815/100) and future Pentium Processors
to form a CPU Cache chip set designed for high performance servers and
function-rich  desktops. The high-speed  interconnect between  the CPU
and  cache components has  been optimized  to provide  zero-wait state
operation. This CPU  Cache chip set is fully  compatible with existing
software,  and has new  data integrity  features for  mission critical
applications.

The 82498 Cache Controller implements the MESI write-back protocol for
full multiprocessing support.  Dual ported buffers and registers allow
the 82498  to concurrently  handle CPU bus,  memory bus,  and internal
cache operation for maximum performance.

The 82493 is a customized high-performance SRAM that supports 64-, and
128-bit  wide memory  bus widths,  32-,  and 64-byte  line sizes,  and
optional sectoring. The  data path between the CPU  bus and memory bus
is  separated  by  the  82493,  allowing  the  CPU  bus  to  handshake
synchronously,  asynchronously,  or   with  a  strobed  protocol,  and
allowing concurrent CPU bus and memory bus operations.

***Configurations:...
***Features:...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
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**5595       Pentium PCI System I/O                          <12/24/97
***Notes:...
***Info:
SiS5595  is a  highly integrated  system I/O  that constitutes  a high
performance, rich featured, yet glueless solution for both Pentium and
Pentium  II  systems.   

The SiS5595 PCI  system I/O integrates the PCI-to-ISA  bridge with the
DDMA and PC/PCI  DMA, Serial IRQ capability, the  ACPI/Legacy PMU, the
Data  Acquisition   Interface,  the  Universal   Serial  Bus  host/hub
interface,  and the  ISA bus  interface,  which contains  the ISA  bus
controller, the  DMA controllers,  the interrupt controllers,  and the
Timers.  It also integrates the Keyboard controller, and the Real Time
Clock (RTC).  The built-in USB controller, which is fully compliant to
OHCI (Open Host Controller  Interface), provides two USB ports capable
of running full/low speed  USB devices. The Data Acquisition Interface
offers  the  ability of  monitoring  and  reporting the  environmental
condition  of the  PC.  It  could monitor  5  positive analog  voltage
inputs, 2  Fan speed inputs,  and one external temperature  inputs. It
also integrates the automatic power control logic to control the power
ON/OFF for ATX power supply.  In addition, SiS5595 also integrates the
thermal  detection and frequency  ratio control  logic for  Pentium II
CPU.

***Versions:...
***Features:...
**950        LPC I/O                                         <07/16/99...
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