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**82385SX     32-bit Cache Controller for 80386SX             01/25/89
***Notes:...
***Info:...
***Versions:...
***Features:
o   Improves 386 SX System Performance
    - Reduces Average CPU Wait States to Nearly Zero
    - Zero Wait State Read Hit
    - Zero Wait State Posted Memory Writes
    - Allows Other Masters to Access the System Bus More Readily
o   Hit Rates up to 99%
o   Optimized as 386 SX Companion
    - Simple 386 SX Interface
    - Part of Intel386-Based Compute Engine Including 387 SX Math 
      Coprocessor and 82370 Integrated System Peripheral
    - 16 MHz and 20 MHz Operation
o   Software Transparent
o   Synchronous Dual Bus Architecture
    - Bus Watching Maintains Cache Coherency
o   Maps Full 386 SX Address Space 
o   Flexible Cache Mapping Policies
    - Direct Mapped or 2-Way Set Associative Cache Organization
    - Supports Non-Cacheable Memory Space
    - Unified Cache for Code and Data
o   Integrates Cache Directory and Cache Management Logic
o   High Speed CHMOS Technology
    - 132-Pin PGA Package

**82395DX     High Performance Smart Cache                    06/18/90...
**82395SX     Smart Cache                                     12/17/90
***Notes:...
**82396SX     Smart Cache                                     12/17/90...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
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*OPTi...
**82C898         System/Power Management Controller (non-cache)c:Nov94
***Notes:...
***Info:
Overview
The 82C898 provides a highly integrated solution for fully compatible,
high performance PC/AT platforms. The 82C898 supports 486SX/DX/DX2/DX4
and  P24T  microprocessors  in  the  most  cost  effective  and  power
efficient designs  available today. For  high-end system applications,
this  device offers  optimum  performance for  systems  running up  to
50MHz.  

Based  fundamentally  on  OPTi’s   proven  82C801  and  82C802  design
architectures,  the 82C898 adds  additional memory  configurations and
extensive  power  management  control  for  the  processor  and  other
motherboard components.

The 82C898  supports the latest  in write-back processor  designs from
Intel, AMD, and Cyrix, as well as supporting the AT bus and VESA local
bus  for compatibility  and performance.  It also  includes  an 82C206
Integrated Peripherals Controller (IPC),  all in a single 208-pin PQFP
(Plastic Quad Flat Pack) for low cost.

Power Management
Figure  2-1   [see  datasheet]  exemplifies  the   flexibility  of  an
82C898/82C602-based designs GREEN strategy.  System designs can easily
accommodate both  SLe and non-SLe  CPUs.  If  an Intel non-SLe  CPU is
used, SMI#, SMIAOT#, and FLUSH# are no connects. One design can easily
accommodate  both  types  of   processors  with  minimal  changes  for
upgrades.

***Configurations:...
***Features:...
**
**Support Chips:
**82C601/2       Buffer Devices                                 <Nov94...
**82C822         PCIB (VLB-to-PCI bridge)                         c:94...
**Other:...
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