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*_IBM...
*ACC Micro...
**ACC2087 Enhanced Super Chip (486 Single Chip) <Aug96
***Info:...
***Configurations:...
***Features:
o Supports Intel iDX4, AMD AM486, Cyrix 5x86, TI 486s, and IBM Blue
Lightning microprocessor with operation up to 50 MHz
o 3.3V / 5.0V mixed voltage system design
o Level 1 Write Back Cache
o Level 2 Cache Controller
- Support either write back or write through implementation
- Up to 2 MB in cache size
o High Performance DRAM Controller
- Supports four banks of 32-bit DRAM, Fast Page Mode only,
allowing up to 64 MB memory
o Integrated Peripheral Controller: 2 x 8237, 2 x 8259, 1 x 8254,
1 x 74612
o Integrated Floppy Disk Controller supports two floppy disk drives
o Supports one IDE interface
o Supports two high speed 16C550 compatible UARTs with 16 Byte FIFOs
o Supports one bi-directional Parallel port with ECP mode
o Support PPM mode where Floppy Disk Drive can be used on Parallel
Port
o PS/2 compatible Keyboard Controller and Mouse
o Power Management Control
- Power-On Suspend
- Power-Off Suspend
- Doze / Idle Detection
- Suspend / resume Button
- APM support
- SMM / SMI
- Stop Clock Protocol
- Battery monitoring signal and dedicated low-battery warning
alarm
o Supports Flash EPROM
o Local Bus IDE
o Fast reset / Fast gate A20 (Port 92)
o 256-pin PQFP device
**ACC2089 486 PCI-based System Super Chip [no datasheet] ?...
**ACC2168/GT 32-bit 486 Green System Single Chip [no datasheet] ?...
**ACC2178A 32-bit 486 Green System Single Chip [no datasheet] ?...
**ACC2268 ?486 [no datasheet] ?...
**ACC???? Maple/Maple-133 486-System-On-Chip [no datasheet] ?...
**
**Support Chips:
**ACC2016 Buffer and MUX Logic c96
***Info:
The ACC Micro 2016 is designed to work together with the system core
logic products to provide the decoding logic for the Real Time Clock
(RTC), address buffer, and data buffer for the 486/386DX and Pentium
applications. At least seven TTLs can be saved when using the 2016.
The 2016 can be used with either the 2268/2178/2168/2056/2057/
2066/2048 system logic or the 2086/2087/2089 super chip. The 2016 is
based on the condition of the /ROMCS signal to determine which system
logic to work with. During power up, if the /ROMCS is pulled high, it
works with the 2268/2178/2168/2056/2057/2066/2048 system logic. If
/ROMCS is pulled low, it works with the 2086/2087/2089 super chip. The
/RTCDS signal (pin 97) requires a pull low through a damping register
for all system logic applications.
***Versions:...
***Features:...
**ACC2020 Power Management Chip c92...
**ACC5500 Multifunction I/O Control Chip for PS2 Model 50/60 c88...
**
**Other chips...
*ALD...
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*AMD . . . . . . . [no datasheets, some info]...
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*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82395SX Smart Cache 12/17/90
***Notes:...
**82396SX Smart Cache 12/17/90...
**82485 Turbo Cache (and 485Turbocache) c90...
**82489DX Advanced Programmable Interrupt Controller 10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
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