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**82335 High-Integration Interface Device For 386SX c:Nov88
***Notes:
Full title "High-Integration Interface Device For 386SX Microprocessor
Based PC-AT Systems"
***Info:...
***Versions:...
***Features:...
**82360SL I/O Subsystem 10/05/90...
**82370 Integrated System Peripheral (for 82376) c:Oct88...
**82371FB/SB PCI ISA IDE Xcelerator 82371FB/82371SB (PIIX/3) 01/31/95...
**82371MX Mobile PCI I/O IDE Xcelerator (MPIIX) 11/01/95...
**82371AB PCI-TO-ISA / IDE Xcelerator 82371AB (PIIX4) 02/17/97...
**82374/82375 PCI-EISA Bridge (82374EB/82375EB, 374SB/375SB) c:Mar93...
**82378 System I/O (SIO) (82378IB and 82378ZB) c:Mar93...
**82379AB System I/O-APIC (SIO.A) <Dec94...
**82380 32-bit DMA Controller w/ Integrated Peripherals 02/01/87...
**82380FB/AB PCIset: 82380FB Mobile PCI-to-PCI Bridge(MPCI2) 02/17/97...
**82384 Clock Generator and Reset Interface c86...
**82385 32-bit Cache Controller for 80386 09/29/87...
**82385SX 32-bit Cache Controller for 80386SX 01/25/89...
**82395DX High Performance Smart Cache 06/18/90...
**82395SX Smart Cache 12/17/90...
**82396SX Smart Cache 12/17/90...
**82485 Turbo Cache (and 485Turbocache) c90...
**82489DX Advanced Programmable Interrupt Controller 10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91
***Notes:...
***Info:...
***Features:...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
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*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
**85C496/497 486-VIP 486 Green PC VESA/ISA/PCI Chipset <95
***Info:...
***Configurations:...
***Features:
o Host Bus
- Supports Intel 486, P24D, P24T, DX4, SL
- Enhanced 486, AMD 486, Enhanced Am486, and Cyrix M7/Cx 5x86
in 25/33/40/50 Mhz, 5V CPU.
o VESA Bus Slave
- Supports VESA Bus Specification Rev. 2.0p with Local Device
Target only.
o PCI Local Bus
- Supports PCI Bus Specification Rev. 2.0 with up to 4 PCI Masters
- Implements 3 Level Post Write Buffer for CPU write PCI Target
Memory Cycle.
- Supports Back to Back Single Memory Write to PCI Burst Write.
- Supports PCI Interrupt Steering with Four PIRQ Inputs.
- Supports PCI Master Burst Accesses On-Board Memory Up to 64
Double Word Long.
- Supports Concurrency PCI Bus.
- Snoop Filter and Advanced Snooping for Reducing CPU Snoops
During Sequential PCI Master Accesses On-Board Memory Cycles.
- Supports PCI Bus PCI to PCI Bridge.
o Supports L1 Cache Write Back CPU (P24T/P24D/M7/Enhanced Am486)
systems
o Supports Cx 5x86 Linear Burst Order Mode.
o L2 Cache Controller
- Write-Back or Write-Through Schemes
- Bank Interleave/Non-Interleave Cache Access
- Cache Size: 64K/128K/256K/512K/1MB
- 8 bit or 7 bit Tag (Combined Tag and Dirty SRAM) with
Direct-Mapped cache organization.
- Optional Separate Dirty SRAM.
o DRAM Controller
- Supports 8 Banks Non-Interleaved Access for Single and Double
Sided SIMMs up to 255 MBytes.
- Supports DRAM CAS Before RAS Refresh.
- Supports "Table-Free" DRAM configuration.
- Programmable driving current for the DRAM signals.
- Supports Symmetrical and Asymmetrical DRAMs.
- Supports 256K/512K/1M/2M/4M/8M/16M/32M xN Fast Page Mode and
EDO DRAM.
o Built-In Local Bus IDE Interface
- Supports Data Conversion for the Double Word Accessing
- Supports Symmetry Configuration for Channel 1 and Channel
0, PIO Mode IDE Hard Disks.
- Supports Mode 3 and above Timing.
- Supports Individual Drive Timing Setting for Optimal Performance
- Supports Posted Write Buffers and Pre-fetch Buffer.
- Supports Primary IDE or Secondary IDE Addressing (1Fx/17x)
o Fast-Slow Link Interface
- Linkage to ISA Bridge by FS-Link Interface.
- Fast Access to BIOS, ISA Memory Holes, and Interrupt Acknowledge
Cycle by FS-Link.
- Two Programmable Non-Cacheable Regions
- Two Programmable PCI Memory Holes and One Programmable ISA
Memory Holes.
o 208-Pin PQFP
o 0.6um Low Power CMOS Technology
**85C501/502/503 Pentium/P54C PCI/ISA Chipset <01/09/95...
**5101/5102/5103 Pentium/P54C PCI/ISA Chipset <04/02/95...
**5120 Pentium PCI/ISA Chipset (Mobile) <01/28/97...
**5501/5502/5503 Pentium/P54C PCI/ISA Chipset <04/02/95...
**5511/5512/5513 Pentium PCI/ISA <06/14/95...
**5571 (Trinity) Pentium PCI/ISA Chipset (75MHz) <12/09/96...
**5581/5582 (Jessie) Pentium PCI/ISA Chipset (75MHz) <04/15/97...
**5591/5592/5595 (David) Pentium PCI A.G.P. Chipset <01/09/98...
**5596/5513 (Genesis) Pentium PCI Chipset <03/26/96...
**5597/5598 (Jedi) Pentium PCI/ISA Chipset <04/15/97...
**530/5595 (Sinbad) Host, PCI, 3D Graphics & Mem. Ctrl.<11/10/98...
**540 (Spartan) Super7 2D/3D Ultra-AGP Single C.S.<11/30/99...
**55x SoC (System-on-chip) <03/14/02...
**
**Support chips:
**85C206 Integrated Peripheral Controller [no datasheet] ?...
**5595 Pentium PCI System I/O <12/24/97...
**950 LPC I/O <07/16/99...
**Other:...
**PII/III/Pro...
**Athlon etc...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...
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