[Home] [This version is outdated, a new version is here]
*Title...
*Search:...
*Read Me/FAQ/General Info...
*_IBM...
*ACC Micro...
*ALD...
*ALi...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82350DT EISA Chip Set 04/22/91
***Notes:
date source: TimelineDateSort7_05.pdf
Information taken from: Intel_Peripheral_Components_1994.pdf*
1992-Oct_82351.pdf
1991-Oct_82353.pdf
1992-Oct_82352DT.pdf
1994-May_82355.pdf
1992-Oct_82357.pdf, 1994-Mar_82357.pdf
1991-Oct_82358DT.pdf
1992-Oct_82359.pdf
>*Section:
"General / 82350 EISA Chip Set" ----------------- dated Sep 1992
"82351 Local I/O EISA Support Peripheral (LIO.E)" dated Oct 1992
"82352DT EISA Bus Buffer (EBB)" ----------------- dated Oct 1993
"82357 Integrated System Peripheral (ISP)" ------ dated Oct 1992
"82358DT EISA Bus Controller" ------------------- dated Oct 1992
"82355 Bus Master Interface Controller (BMIC)" -- dated Sep 1993
All information is taken from the above source, unless stated
otherwise below:
#1 Information taken from: 1992-Oct_82359.pdf, for section "82359 DRAM
Controller" is solely from this source.
#2 Information taken from: 1994-May_82355.pdf, is identical to that in
the first reference.
#3 Information taken from: 1991-Oct_82358DT.pdf, contains the
additional feature:
• [Supports i486 Burst Cycles to the EISA/ISA Bus When Configured
for 82350DT Systems]
In the Info section, all text after "2.0 INTRODUCTION" is solely
from this source.
#4 Information taken from: 1992-Oct_82357.pdf, is identical in the
feature section. In the Info section, all text is solely from
this source. Of the quoted text the 1994-Mar_82357.pdf is the same.
#5 Information taken from: 1992-Oct_82352DT.pdf, contains some
differences in the feature section. This earlier source has the
following feature:
• The 82352 Interfaces Easily to the System...
instead of:
• The 82352DT Interfaces Easily to the System...
Also it contains the two additional features:
• The 82352 and 82352DT are Socket Compatible
• The 82352DT is Designed to Meet All of the 82352 Specifications
The quoted text in the info section is the same. This source
provides further detailed information.
#6 Information taken from: 1992-Oct_82351.pdf, is identical in the
feature section. In the Info section, all text is solely from
this source.
#7 Information taken from: 1991-Oct_82353.pdf, for section "82353
Advanced Data Path Device" is solely from this source.
The code name for this chipset is "Mongoose" see:
Computerworld Apr 15, 1991 p106 - Back on the Bus
***Info:...
***Configurations:...
***Features:...
**82420TX/ZX PCIset (for 486) TX (Saturn), ZX (Saturn II) c:Nov92...
**82420EX PCIset (for 486) EX (Aries) (82425EX/82426EX) <Dec94...
**82430LX PCIset (Pentium) LX (Mercury) (82433LX/82434LX) 03/22/93...
**82430NX PCIset (Pentium) NX (Neptune) (82433NX/82434NX) Mar94...
**82430FX PCIset (Pentium) FX (Triton I) (82437FX/82438FX)01/31/95...
**82430MX PCIset (Pentium) MX (Mobile Triton)(82437/438MX)11/01/95
***Notes:...
***Info:
The Intel 430MX PCIset consists of the 82437MX System Controller
(MTSC). two 82438MX Data Paths (MTDP), and the 82371MX PCI I/O IDE
Xcelerator (MPIIX). The PCIset forms a Host-to-PCI bridge and provides
the second level cache control and a full function 64-bit data path to
main memory. The MTSC integrates the cache and main memory DRAM
control functions and provides bus control for transfers between the
CPU, cache, main memory, and the PCI Bus. The second level (L2) cache
controller supports a write-back cache policy for cache sizes of 256
Kbytes and 512 Kbytes. Cacheless designs are also supported. The cache
memory can be implemented with either standard, burst, or pipelined
burst SRAMs. An external Tag RAM is used for the address tag and an
internal Tag RAM for the cache line status bits. For the MTSC DRAM
controller, four rows are supported for up to 128 Mbytes of main
memory. The MTSC optimized PCI interface allows the CPU to sustain the
highest possible bandwidth to the graphics frame buffer at all
frequencies. Using the snoop ahead feature, the MTSC allows PCI
masters to achieve full PCI bandwidth. The MTDPs provide the data
paths between the CPU/cache, main memory, and PCI. For increased
system performance. the MTDPs contain read prefetch and posted write
buffers.
***Configurations:...
***Features:...
**82430HX PCIset (Pentium) HX (Triton II) (82439HX) 02/12/96...
**82430VX PCIset (Pentium) VX (Triton II) (82437VX/82438) 02/12/96...
**82430TX PCIset (Pentium) TX (Triton II) (82439TX) 02/17/97...
**82450KX/GX PCIset (Pentium Pro) KX/GX (Mars/Orion) 11/01/95...
**
**Support Chips:
**82091AA Advanced Interface Peripheral (AIP) c93...
**8289 Bus Arbiter (808x) c79...
**82289 Bus Arbiter for iAPX 286 Processor Family c83...
**82258 Advanced Direct Memory Access Coprocessor(ADMA) 01/01/84...
**82335 High-Integration Interface Device For 386SX c:Nov88...
**82360SL I/O Subsystem 10/05/90...
**82370 Integrated System Peripheral (for 82376) c:Oct88...
**82371FB/SB PCI ISA IDE Xcelerator 82371FB/82371SB (PIIX/3) 01/31/95...
**82371MX Mobile PCI I/O IDE Xcelerator (MPIIX) 11/01/95...
**82371AB PCI-TO-ISA / IDE Xcelerator 82371AB (PIIX4) 02/17/97...
**82374/82375 PCI-EISA Bridge (82374EB/82375EB, 374SB/375SB) c:Mar93...
**82378 System I/O (SIO) (82378IB and 82378ZB) c:Mar93...
**82379AB System I/O-APIC (SIO.A) <Dec94...
**82380 32-bit DMA Controller w/ Integrated Peripherals 02/01/87...
**82380FB/AB PCIset: 82380FB Mobile PCI-to-PCI Bridge(MPCI2) 02/17/97...
**82384 Clock Generator and Reset Interface c86...
**82385 32-bit Cache Controller for 80386 09/29/87...
**82385SX 32-bit Cache Controller for 80386SX 01/25/89...
**82395DX High Performance Smart Cache 06/18/90...
**82395SX Smart Cache 12/17/90
***Notes:...
**82396SX Smart Cache 12/17/90...
**82485 Turbo Cache (and 485Turbocache) c90...
**82489DX Advanced Programmable Interrupt Controller 10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...
(c) Copyright mR_Slugs Warehouse - All rights Reserved