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**82340SX     Chip Set (VLSI) (82343/82344)                   01/25/89
***Notes:...
***Info:...
***Configurations:...
***Features:
o   Two Chip ISA (Industry Standard Architecture) Chip Set Capable 
    of Use in 386 SX-Based Systems Up to 20 MHz
o   Both Chips are 160 Quad Flatpacks 1.0- and 1.5-Micron CMOS
o   Memory Control of One to Four Banks of 16-Bit DRAM Using 256K,
    1M, or 4M Components Allowing 32 Mbytes on System Board
o   Page Mode DRAM Operation on Any Number of Banks
o   Two/Four-way Interleaving or Direct Access on System Board
    Memory
o   Programmable Option for block or Word Interleave
o   Programmable DRAM Timing Parameters
o   Remap Option Allows Logical Reordering of System Board DRAM
o   System Board Refresh Optionally Decoupled from Slot Bus
    Refresh
o   Staggered Refresh Minimizes Power Supply Load Variations
o   Built-in "Sleep" Mode Features Including Use of Slow Refresh
    DRAMs in Power Critical Operations
o   EMS Hardware Supports Full LIM EMS 4.0 Spec over Entire 32 Mbyte
    Memory Map with Backfill to 256K-Includes Tow Sets of 36 Mapping
    Registers Each
o   Shadow RAM Support in 16K increments over Entire 640K to 1M range
o   Support for 387SX Numerical Coprocessors
o   Software Coprocessor Reset can be Disabled
o   Internal Switching and Programmable CLK2 Support for Slow and 
    "Turbo" Modes
o   Programmable Drive on DRAM and Slot Bus Interface Signals Allows
    Direct Tailored to System Size
o   Asynchronous or Synchronous Slot Bus Operation with Programmable
    bus Clock Divider
o   Bus "Quiet" Mode Assures that Slot Bus Signal Lines are Driven Only
    During Slot Accesses
o   Integrated Peripheral Functions:
    - Two 82C37A DMA Controllers
    - Two 82C59A Interrupt Controllers
    - One 82C54  Timer
    - One 148618 Real Time Clock
o   Supports 8- or 16-Bit Wide BIOS ROMs
o   I/O Decode Programmable for 10- or 16-Bit Addresses
o   Separate Parity Generators/Checkers for High Speed Operation
o   Designed for Systems with Up to 12 MHz Backplane Operation
o   Three-State Control Pins Added for Board Level Testability
o   Compatible with Lotus 1-2-3 Version 3.0 in 1M Systems


**82350       EISA Chip Set                                   07/10/89...
**82350DT     EISA Chip Set                                   04/22/91...
**82420TX/ZX  PCIset (for 486) TX (Saturn), ZX (Saturn II)     c:Nov92...
**82420EX     PCIset (for 486) EX (Aries)   (82425EX/82426EX)   <Dec94...
**82430LX     PCIset (Pentium) LX (Mercury) (82433LX/82434LX) 03/22/93...
**82430NX     PCIset (Pentium) NX (Neptune) (82433NX/82434NX)    Mar94...
**82430FX     PCIset (Pentium) FX (Triton I) (82437FX/82438FX)01/31/95...
**82430MX     PCIset (Pentium) MX (Mobile Triton)(82437/438MX)11/01/95...
**82430HX     PCIset (Pentium) HX (Triton II) (82439HX)       02/12/96...
**82430VX     PCIset (Pentium) VX (Triton II) (82437VX/82438) 02/12/96...
**82430TX     PCIset (Pentium) TX (Triton II) (82439TX)       02/17/97...
**82450KX/GX  PCIset (Pentium Pro) KX/GX (Mars/Orion)         11/01/95...
**
**Support Chips:
**82091AA     Advanced Interface Peripheral (AIP)                  c93...
**8289        Bus Arbiter (808x)                                   c79...
**82289       Bus Arbiter for iAPX 286 Processor Family            c83...
**82258       Advanced Direct Memory Access Coprocessor(ADMA) 01/01/84...
**82335       High-Integration Interface Device For 386SX      c:Nov88...
**82360SL     I/O Subsystem                                   10/05/90...
**82370       Integrated System Peripheral (for 82376)         c:Oct88...
**82371FB/SB  PCI ISA IDE Xcelerator 82371FB/82371SB (PIIX/3) 01/31/95...
**82371MX     Mobile PCI I/O IDE Xcelerator (MPIIX)           11/01/95...
**82371AB     PCI-TO-ISA / IDE Xcelerator 82371AB (PIIX4)     02/17/97...
**82374/82375 PCI-EISA Bridge (82374EB/82375EB, 374SB/375SB)   c:Mar93...
**82378       System I/O (SIO) (82378IB and 82378ZB)           c:Mar93...
**82379AB     System I/O-APIC (SIO.A)                           <Dec94...
**82380       32-bit DMA Controller w/ Integrated Peripherals 02/01/87...
**82380FB/AB  PCIset: 82380FB Mobile PCI-to-PCI Bridge(MPCI2) 02/17/97...
**82384       Clock Generator and Reset Interface                  c86...
**82385       32-bit Cache Controller for 80386               09/29/87...
**82385SX     32-bit Cache Controller for 80386SX             01/25/89...
**82395DX     High Performance Smart Cache                    06/18/90...
**82395SX     Smart Cache                                     12/17/90
***Notes:...
**82396SX     Smart Cache                                     12/17/90...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
**5597/5598      (Jedi)    Pentium PCI/ISA Chipset           <04/15/97
***Info:
Nowadays, several PC  form factors exist in the  PC board market, such
as  NLX, LPX,  ATX  and Baby-AT  form  factors. Due  to the  different
placements  of the  form factor,  PC chipsets  should be  prepared for
different board  layouts. As a  result, SiS chips based  on compatible
logic design provide two series of chipsets, SiS 5597 and SiS 5598, to
assist board designers for their board layouts.

SiS 5597’s pin assignment is based  on NLX, and LPX form factor, while
SiS 5598’s is defined on the basis of ATX and Baby-AT form factors. In
the next few chapters, you will read “SiS Chip” which indicates either
SiS 5597 or  5598 chipsets, decided by the  placements of form factors
on PC boards of customers.

The  SiS Chip  with built-in  VGA  controller is  a highly  integrated
single chip solution for Pentium PCI/ISA system. A portion of on-board
DRAM is  shared with the integrated  VGA controller. In  that way, the
system cost  is substantially  reduced and on-board  DRAM can  be used
flexibly.

The  SiS Chip  consists of  Host-to-PCI  bridge function,  PCI to  ISA
bridge  function,  PCI IDE  function,  Universal  Serial Bus  host/hub
function, Integrated RTC, Integrated Keyboard Controller and Graphics/
Video accelerate function.

SiS Chip  supports Enhanced  Power Management, including  legacy Power
Management  Unit  and   Advanced  Configuration  and  Power  Interface
(ACPI).  It also  supports ATA  Synchronous DMA  transfer  protocol to
improve  the IDE performance  and Common  Architecture for  moving ISA
function to PCI to improve system performance.

***Configurations:...
***Features:...
**530/5595       (Sinbad) Host, PCI, 3D Graphics & Mem. Ctrl.<11/10/98...
**540            (Spartan) Super7 2D/3D Ultra-AGP Single C.S.<11/30/99...
**55x            SoC (System-on-chip)                        <03/14/02...
**
**Support chips:
**85C206     Integrated Peripheral Controller [no datasheet]         ?...
**5595       Pentium PCI System I/O                          <12/24/97...
**950        LPC I/O                                         <07/16/99...
**Other:...
**PII/III/Pro...
**Athlon etc...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...

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