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**M1535/D        South Bridge                                        ?
***Info:...
***Versions:...
***Features:
o   Provides a High Integration Bridge (with Audio, HSP Modem, Super 
    I/O & Fast IR) between PCI Bus and Peripheral Bus for Notebook or 
    Mobile Systems
o   PCI 3.3V/5V Tolerance Interface
    - Supports PCI Master and Slave Interface
    - Supports PCI Master and Slave Initiated Termination
    - Concurrent PCI Architecture
    - PCI spec. 2.2 Compliant
    - PCI Power Management Interface spec. 1.1 Compliant
o   Provides Steerable PCI Interrupts for PCI Device Plug-and-Play
    - Up to 8 PCI Interrupts Routing
    - Level to Edge Trigger Transfer
o   Enhanced DMA Controller
    - Provides 7 Programmable Channels, 4 for 8-bit Data Size, 3 for 
      16-bit Data Size
    - 32-bit Addressability
o   Interrupt Controller
    - Provides 14 Interrupt Channels
    - Independent Programmable Level/Edge Triggered Channels
o   Counter/Timers
    - Provides 8254 Compatible Timers for System Timer, Refresh 
      Request, Speaker Output Use
o   Distributed DMA Supported
    - 7 DMA Channels can be Arbitrarily Programmed as Distributed 
      Channels
o   PC/PCI DMA Supported
    - 1 PC/PCI DMA Channel Interface Provided
o   Serialized IRQ Supported
    - Quiet/Continuous Mode
    - Programmable (Default 21) IRQ/DATA Frames
    - Programmable START Frame Pulse Width
o   Plug-and-Play Supported
    - 2 Programmable Chip Select
    - 2 Steerable Interrupt Request Lines
o   Built-in Keyboard Controller
    - Built-in PS2/AT Keyboard and PS2 Mouse Controller
o   Supports up to 512 KB ROM Size Decoding
o   PMU Features
    - Full Support for ACPI and OS Directed Power Management to meet 
      system requirement of PC98/PC99
    - Full Support for Instantly Available PC feature
    - CPU SMM Legacy Mode and SMI Feature Supported
    - Full Support for Clock Control Functions of both Pentium and 
      Pentium II CPUs.
    - Supports I/O Trap for I/O Restart Feature
    - PMU Operation States:
      1. G0 State
       - On
       - Standby Mode
      2. G1 State (Suspend Mode 1)
       - S1 State (Power On Suspend)
       - S3 State (Suspend To RAM)
       - S4 State (Suspend To DISK)
      3. G2 State (Suspend Mode 2)
       - S5 State (Soft-Off)
      4. G3 State (Mechanical-Off)
    - APM State Detection and Control Logic Supported
    - Global and Local Device Power Control Logic
    - 10 Monitor Timers: Standby/ APMA ~D/ Global-Display/ HDD A~B/ 
      SIO & Audio/ GPIO.
    - 2 Low Battery timers supported.
    - Provides System Activity and Display Activity Monitoring, 
      including
      - Video
      - Audio
      - Hard Disk
      - Floppy Disk
      - Serial Ports
      - Parallel Port
      - Keyboard
      - 4 Programmable I/O Group
      - 2 Programmable Memory Space
    - Provides Hot Plugging Events Detection
      - Docking Insert
    - Multiple External Wakeup Events of Standby Mode (G0)
      - Power Button
      - Sleep Button
      - Modem Ring
      - RTC Alarm
      - DRQ2
    - Resume Events detected Wake Up from Suspend Mode (G1, G2)
      - 9 resume events supported.
      - Power Button
      - Sleep Button
      - RTC Alarm
      - PCI PMEJ Signal
      - Modem Ring
      - USB Events
      - AC’97
      - Hotkey KBD & MS
      - IRQ 1 & 12
    - CLKRUN# Function Supported for PCI Mobile Design Guide Ver1.1
    - Thermal Alarm Supported
    - Clock Generator Control Logic Supported
      - CPUCLK Stop Control
      - PCICLK Stop Control
    - L2 Cache Power Down Control Logic Supported
    - Up to 25 Run Time Events Supported (included 8 Extended Run Time
      Events).
    - Up to 12 General Purpose Input Signals, Up to 1 5 General 
      Purpose Output Signals and up to 30 General Purpose Input/Output
      Signals
    - 16 Extended General Purpose Input Signals, 16 Extended General 
      Purpose Output Signals, and 8 Extended Run Time Events 
      supported.
    - All Registers Readable/Restorable for Proper Resume from Suspend
      State
    - Hotkey for Power on Button Function through Keyboard or Mouse
    - Supports Power Loss Recovery
    - Watch Dog Timer for
      - Set a Bit in Register
      - Generate an SMI#/SCI/NMI/INIT
      - Generate System Reset
o   Built-in PCI IDE Controller
    - Supports Ultra DMA Mode Transfers up to Mode 4 Timing (33/66 
      Mbps)
    - Supports PIO Modes up to Mode 4 Timings, and Multiword DMA Mode 
      0,1,2 with Independent Timing of up to 4 Drives
    - Integrated 16 x 32-bit Read Ahead & Posted Write Buffers for 
      each channel (Total: 32 DWords)
    - Dedicated Pins of ATA Interface for each Channel
    - Supports Tri-state IDE Signals for Swap Bay
    - Supports Command Queue IDE enhancement
o   USB Interface
    - One Root Hub with four USB Ports Based on OpenHCI 1.0a 
      Specification
    - Supports FS (12Mbits/sec) and LS (1.5Mbits/sec) Serial Transfer
    - Supports Legacy Keyboard and Mouse Software with USB-based 
      Keyboard and Mouse
o   SMBus Interface
    - System Management Bus Interface Meets the V1.0 Specification
    - SMBALERT# Support
    - I2C protocol Support
o   Hotkey for Power on Button Function through Keyboard
o   Super I/O Interface
    - Supports Windows Plug-and-Play
    - Supports 2 Serial/ 1 Parallel/ FDC Functions
    - Supports 16-bit Address Decoder
    - 2.88 MB (Formatted) Floppy Disk Controller
     - Software Compatible with 82077 and Supports 16-byte Data FIFOs
     - High Performance Internal Data Separator
     - Supports Standard 1 Mbps/ 500 Kbps/ 300 Kbps/ 250 Kbps Data 
       Transfer Rate
     - Supports 3 modes of 3.5“ FDD ( 720KB / 1.2 MB / 1.44 MB )
     - Swappable Drives A and B
     - Programmable 7-bit I/O Base Address
    - Various Mode Parallel Port
      - Supports ECP/ EPP / PS/2 / SPP and 1284 Compliance
      - Standard Mode
      - Programmable 8-bit I/O Base Address
      - Multiplexing of FDC Signals through Parallel Port Pins
      - 12 IRQ Channel Options
      - 4 8-bit DMA Channel Options
      - IBM PC/XT, PC/AT and PS/2 Compatible Bi-directional Parallel 
        Port
      - Enhanced Mode
        - Enhanced Parallel Port (EPP) Compatible
        - EPP is Compatible with EPP1.9 (IEEE 1284 Compliant ), also 
          supports EPP1.7 of Xircom Specification
      - High Speed Mode
       - Microsoft and Hewlett Packard Extended Capabilities Port 
         (ECP) Compatible
       - IEEE1284 Compatible ECP 
       - Includes Protection Circuit against damage caused when 
         printer is powered up, or operated at higher voltages
    - Serial Ports
      - Three High Performance 16450/16550 Compatible UARTs with 
        Send/Receive 16-byte FIFOs
      - Programmable Baud Rate Generator
      - Wireless Communications
      - Dedicated pins and COM Port for Infrared Transmission
      - Supports IrDA 1.0 (SIR) and IrDA 1.1 (MIR and FIR)
      - Supports Sharp-IR
      - MIDI (Musical Instrument Digital Interface) Compatible
      - High Performance Power Management for FDC, UART and Parallel 
        Port
      - Option between Programmable 7-bit I/O Base Addresses, 12 IRQs, 
        and 4 DMA Channels for each Device
o   Audio System
    - Fully Plug-and-Play PCI controller and software
    - PCI 2.2 compliant bus master optimized for multiple stream 
      operation
    - On-chip per voice cache minimizes PCI bandwidth
    - Hardware multi-channel digital mixer
    - 32 voices polyphony wavetable synthesizer supports all 
      combinations of stereo/mono, 8-/16-bits, and signed/unsigned 
      samples.
    - Per channel for wavetable synthesis with envelop, pitch shift,
      tremolo and vibrato
    - DLS1-compliant Downloadable Samples support
    - DirectMusic with unlimited downloadable samples in system memory
    - Legacy game audio with SoundBlaster Pro/16 compatibility
    - Legacy game FM and wave table synthesis supported
    - MPU-401 compatible MIDI I/O with FIFO
    - AC97 2.1 support with full duplex, independent sample rate
      converter for recording and playback
    - On-chip sample rate converter ensures all internal operation at 
      48KHz
    - High precision internal 26 bit digital mixer with 20 bit digital
      audio output
    - Microsoft WDM streaming architecture compliant and "Re-routable 
      endpoint" support
    - 32-voices DirectSound channels
    - 16-voices DirectSound3D accelerator with IID, ITD and Doppler 
      effect on 3D positional audio buffers
    - DirectSound accelerator with volume, pan and pitch shift control
      on streaming or static buffers
    - DirectInput support with digital enhanced game port enables an
      analog joystick to emulate digital joystick performance using 
      DirectInput driver. This eliminates up to 12% CPU overhead 
      wasted on joystick polling.
    - DirectX timer for video/audio synchronization
    - Hardware digital volume control
o   Software Modem Interface
    - The M1535 will provide the AC’97 2.1 compliant digital 
      controller interface for third parties (such as the AMC Codec’s 
      vendor) to enable the software modem solution.
    - 4 separate telephony bus master channels. One for modem output, 
      one for mode minput, one for handset input, and one for handset
      output.
    - AC’97 2.1 Modem variable sample rate support for "On Demand" 
      sample transport scheme.
    - AC’97 2.1 GPIO pin status and control support.
    - Power Management and wake-up event support
    - Caller ID string transmission via AC-link support
o   352-pin (27mmx27mm) BGA Package

**
**May not exist:...
**Later Chipsets:...
**Other:...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91
***Notes:...
***Info:...
***Features:
o   Two-Way, Set Associative, Secondary Cache for i860 XP 
    Microprocessor
o   50 MHz "No Glue" Interface with CPU
o   Configurable
    - Cache Size 256 or 512 Kbytes
    - Line Width 32, 64 or 128 Bytes
    - Memory Bus Width 64 or 128 Bits
o   Dual-Ported Structure Permits Simultaneous Operations on CPU and
    Memory Buses
o   Efficient MRU Way Prediction
    - Zero Wait States on MRU Hit
    - One Walt State on MRU Miss
o   Dynamically Selectable Update Policies
    - Write-Through
    - Write-Once
    - Write-Back
o   MESI Cache Consistency Protocol
o   Hardware Cache Snooping
o   Maintains Consistency with Primary Cache via Inclusion Principle
o   Flexible User-Implemented Memory Interface Enables Wide Range of
    Product Differentiation
    - Clocked or Strobed
    - Synchronous or Asynchronous
    - Plpelining
    - Memory Bus Protocol
o   82495XP Cache Controller Available in 208-Lead Ceramic Pin Grid 
    Array Package
o   82490XP Cache RAM Available in 84-Lead Plastic Quad Flatpack 
    Package

**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
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*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
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*Winbond...
*ZyMOS...
*General Sources:...

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