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**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93
***Notes:...
***Info:
The 82496 Cache Controller and multiple 82491 Cache SRAMs combine with
the Pentium processor to form a CPU Cache chip set designed for high
performance servers and function-rich desktops. The high speed
interconnect between the CPU and cache components has been optimized
to provide zero-wait state operation. This CPU Cache chip set is
fully compatible with existing software, and has new data integrity
features for mission critical applications.
The 82496 cache controller implements the MESI write-back protocol for
full multiprocessing support. Dual ported buffers and registers allow
the 82496 to concurrently handle CPU bus, memory bus, and internal
cache operation for maximum performance.
The 82491. is a customized high-performance SRAM that supports 32, 64,
and 128-bit wide memory bus widths, 16, 32, and 64 byte line sizes,
and optional sectoring. The data path between the CPU bus and memory
bus is separated by the 82491, allowing the CPU bus to handshake
synchronously, asynchronously, or with a strobed protocol, and
allowing concurrent CPU bus and memory bus operations.
***Configurations:...
***Features:...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
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*Winbond...
**W83977TF WINBOND I/O (Multi I/O) c97
***Info:...
***Versions:...
***Features:
General
o Plug & Play 1.0A compatible
o Support 13 IRQs, 4 DMA channels, full 16-bit address decoding
o Capable of ISA Bus IRQ Sharing
o Compliant with Microsoft PC97 Hardware Design Guide
o Support DPM (Device Power Management), ACPI
o Report ACPI status interrupt by SCI signal issued from any of the
13 IQRs pins or GPIO xx
o Programmable configuration settings
o Single 24/48 Mhz clock input
FDC
o Compatible with IBM PC AT disk drive systems
o Variable write pre-compensation with track selectable capability
o Support vertical recording format
o DMA enable logic
o 16-byte data FIFOs
o Support floppy disk drives and tape drives
o Detects all overrun and underrun conditions
o Built-in address mark detection circuit to simplify the read
electronics
o FDD anti-virus functions with software write protect and FDD
write enable signal (write data signal was forced to be inactive)
o Support up to four 3.5-inch or 5.25-inch floppy disk drives
o Completely compatible with industry standard 82077
o 360K/720K/1.2M/1.44M/2.88M format; 250K, 300K, 500K, 1M, 2M bps
data transfer rate
o Support 3-mode FDD, and its Win95 driver
UART
o Two high-speed 16550 compatible UARTs with 16-byte send/receive
FIFOs
o MIDI compatible
o Fully programmable serial-interface characteristics:
- 5, 6, 7 or 8-bit characters
- Even, odd or no parity bit generation/detection
- 1, 1.5 or 2 stop bits generation
o Internal diagnostic capabilities:
- Loop-back controls for communications link fault isolation
- Break, parity, overrun, framing error simulation
o Programmable baud generator allows division of 1.8461 Mhz and 24
Mhz by 1 to (2^16-1)
o Maximum baud rate up to 921k bps for 14.769 Mhz and 1.5M bps
for 24 Mhz
Infrared
o Support IrDA version 1.0 SIR protocol with maximum baud rate up to
115.2K bps
o Support SHARP ASK-IR protocol with maximum baud rate up to 57,600
bps
o Support S/W driver for Windows95 and Windows98 (Memphis)
Parallel Port
o Compatible with IBM parallel port
o Support PS/2 compatible bi-directional parallel port
o Support Enhanced Parallel Port (EPP) - Compatible with IEEE 1284
specification
o Support Extended Capabilities Port (ECP) - Compatible with IEEE
1284 specification
o Extension FDD mode supports disk drive B; and Extension 2FDD mode
supports disk drives A and B through parallel port
o Enhanced printer port back-drive current protection
Keyboard Controller
o 8042 based with optional F/W from AMIKKEY-2, Phoenix MultiKey/42
or customer code with 2K bytes of programmable ROM, and 256 bytes
of RAM
o Asynchronous Access to Two Data Registers and One status Register
o Software compatibility with the 8042 and PC87911 microcontrollers
o Support PS/2 mouse
o Support port 92
o Support both interrupt and polling modes
o Fast Gate A20 and Hardware Keyboard Reset
o 8 Bit Timer/ Counter
o Support binary and BCD arithmetic
o 6MHz, 8 MHz, 12 MHz, or 16 MHz operating frequency
General Purpose I/O Ports
o 23 programmable general purpose I/O ports; 1 dedicate, 22 optional
o General purpose I/O ports can serve as simple I/O ports, interrupt
steering inputs, watching dog timer output, power LED output,
infrared I/O pins, general purpose address decoder, KBC control
I/O pins
OnNow Funtions
o Keyboard wake-up by programmable keys (patent pending)
o Mouse wake-up by programmable buttons (patent pending)
Package
o 128-pin PQFP
**W83977EF WINBOND I/O (Multi I/O) <98...
**W83977ATF WINBOND I/O (Multi I/O) <98...
**
**Disk Controller:
**W83759/A/F/AF Advanced VL-IDE Disk Controller <96...
**W83769 Local Bus IDE Solution <94...
**
**UARTS:
**W86C250A UART (equivalent of INS8C250A) [no datasheet]
**W86C450/P Universal Asynchronous Receiver/Transmitter <Jul89...
**W86C451 I/O controller for IBM PC/AT/XT <Jul89...
**W86C452 I/O controller for IBM PC/AT Jul89...
**W86C456 I/O controller [no datasheet] ?
**W860551/P UART with FIFO and Printer Port Controller <94...
**
**Other:...
*ZyMOS...
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