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**82C711   Universal Peripheral Controller II                  c:Jan91
***Info:
The 82C711/712 Universal Peripheral  Controller II (UPC II) are single
chip  controllers offering  a complete  I/O solution  for the  PC-XT &
PC-AT   environments.  The   82C711   and  82C712   chips  are   nearly
operationally and pin identical.

The  82C711  supports the  MOTHERBOARD  application.  It provides  one
enhanced parallel port  (printer/bi-directional), two 16450 UARTs, one
IDE  XT/AT  hard  disk  interface  and  floppy  disk  controller.  The
configuration is  software controllable which can  be integrated into
system BIOS. Power management is  done through the PWRGD pin. When the
chip is powered down (PWRGD  inactive), the current drawn is less that
250  micro  amp.   All  inputs  are  disabled  and   all  outputs  are
inactive. The contents of all  the registers are preserved, as long as
the power supply to the 82C711 is maintained.

The 82C712 supports the  ADAPTER applications. It provides one printer
port,  two  16450 UARTs,  IDE  AT  hard  disk interface,  floppy  disk
controller, and one game port chip select.

The 82C711/712 feature 24 mA  drives for the output buffers, including
the  host data  bus  and parallel  port  data bus.  The floppy  output
drivers  are  capable  of  sinking  48mA. The  host  interface  is  PC
compatible and  can be connected  directly to the bus  (DO-D7, A0-A9,
IOR, IOW, AEN, IRQ3, IRQ4, FINTR, PINTR, and RESET).

***Versions:...
***Features:...
**82C712   Universal Peripheral Controller II                  c:Jan91...
**82C721   Universal Peripheral Controller III                 c:May93...
**82C735   I/O Peripheral Controller With Printgine            c:Jul93...
**82C835   Single CHIP 386sx AT Cache Controller               c:Apr91...
**F87000   Multi-Mode Peripheral Chip                         11/23/93...
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*Contaq  . . . . . [no datasheets, some info]...
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**82485       Turbo Cache (and 485Turbocache)                      c90
***Notes:...
***Info:...
***Versions:...
***Features:...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
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*UMC...
**UM82C852     Multi I/O For XT                                    <91
***Info:
The  Multi-I/O  chip, UM82C852  is  an  integrated  chip of  UM82C450,
UM82C11, UM82C8167. This  chip is a Multi-I/O for  PC/XT and PS2 model
30.

The   82C450  asynchronous   communications  element   (ACE)  performs
serial-to-parallel  conversion   on  data  characters   received  from
peripheral  devices or  modems, and  parallel-to-serial  conversion of
data characters transmitted by the CPU. The complete status of the ACE
can  be read  at  any time  during  functional operation  by CPU.  The
information obtained  includes the type and condition  of the transfer
operations being performed and error conditions.

The  82C11  parallel  port  provides  the user  with  a  bidirectional
parallel data  port that fully  supports the parallel  Centronics type
printer.

The 82C8167 real time clock includes an addressable real time counter,
56 bits  of static RAM with  an on chip oscillation  circuit which can
generate the 32,768 Hz time base.

The 82C852 is packaged in a 68-pin plastic leaded chip carrier.
***Versions:...
***Features:...
**UM82C206     Integrated Peripheral Controller                    <91...
**UM82c45x     Serial/Parallel chips                                 ?...
**Other chips:...
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