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**82495DX/490DX DX CPU-Cache Chip Set <Sep91
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
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**????? (Profusion) c:99...
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**82C822 PCIB (VLB-to-PCI bridge) c:94
***Notes:
OPTi 82C822 is a VLB-to-PCI bridge compatible with many chipsets.
From some Usenet posting (lost source sorry):
"Opti never had a 486 PCI chipset. All mainboards with the chipsets
82C802, 82C895, 82C571, 82C596 (aka "Premium") use the
VLB-->PCI-bridge "chipset" 82C822 for the implementation of PCI
functionality.
Apparently this chipset will only allow 1 32-bit burst transfer per
bus arbitration cycle, which limits throughput to 8 MB/s instead of
(the maximum ideal transfer rate of) 132 MB/s."
***Info:...
***Versions:...
***Features:
o Fully compliant to the PCI V2.0 Specification
o Up to four PCI masters
o Supports system operational speeds of 25, 33, 40, and 50MHz
o Provides central arbiter to arbitrate the bus requests between:
- host CPU
- PCI masters
- DMA/ISA masters
- Refresh
o Offers programmable priority scheme for both the central arbiter
and DMA channels:
- Fixed
- Rotating
- Fixed/Rotating combination
o Burst mode PCI accesses to local memory support
o Combine host CPU sequential writes into PCI burst write cycles
o Interfaces with all OPTi's VL chipset solutions
o Single 208-pin PQFP (Plastic Quad Flat Pack)
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