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**F8680/A  PC/CHIP Single-Chip PC                                  c93
***Notes:...
***Info:...
***Configurations:...
***Features
o   3.3V/5V operation, fully static design, and intelligent sleep mode 
    reduce power consumption approximately 60 percent and allow direct
    battery drive.
o   PC-compatible design supports PC software and 8-bit ISA cards.
o   SuperState R mode provides a separate operating environment and 
    enables complete I/O and interrupt monitoring without BIOS 
    modification.
o   Virtual I/O feature allows device emulation as well as I/O 
    monitoring and control.
o   Virtual Interrupts feature allows interrupts to be monitored and/
    or redirected before any operating system, application program, 
    or TSR sees them.
o   26-bit address bus enables 64MB memory map and allows direct 
    support of PCMCIA  memory card.
o   Four-stage pipeline and 14MHz operation give performance 
    comparable to a 286 or 386SX system.
o   Flexible memory management supports PCMCIA cards and up to three 
    banks of PSRAM, SRAM, and/or DRAM.
o   Bank switching and high memory access overcome the 1MB addressing 
    limitation of the 8086 processor, and enable PCMCIA and EMS 
    support.
o   Single CGA controller manages a CRT or LCD panel display and 
    requires only a single 32Kx8 SRAM to minimize power consumption 
    and board space.
o   Visual Map gray scaling provides excellent visual contrast on any 
    LCD panel.
o   16C450-compatible UART supports COM1 or COM2 or can be disabled.
o   Over 100 configuration registers allow flexibility, control, and 
    differentiation in system design.

F8680A adds:

o   Full PCMCIA 2.0 memory and I/O card support ensure compatibility 
    with current and future expansions.

**
**Support Chips:
**64200    (Wingine) High Performance 'Windows Engine'         c:Oct91...
**82C206   Integrated Peripheral Controller                        c86...
**82C601/A Single Chip Peripheral Controller                 <08/30/90...
**82C607   Multifunction Controller                             <Jun88...
**82C710   Universal Peripheral Controller                     c:Aug90...
**82C711   Universal Peripheral Controller II                  c:Jan91...
**82C712   Universal Peripheral Controller II                  c:Jan91...
**82C721   Universal Peripheral Controller III                 c:May93...
**82C735   I/O Peripheral Controller With Printgine            c:Jul93...
**82C835   Single CHIP 386sx AT Cache Controller               c:Apr91...
**F87000   Multi-Mode Peripheral Chip                         11/23/93...
**Other:...
**Disk:...
**Video:...
*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94
***Notes:...
***Info:...
***Configurations:...
***Features:
o   High Performance Second Level Cache
    - Zero Wait States at 66 MHz 
    - Two-Way Set Associative 
    - Writeback with MESI Protocol 
    - Concurrent CPU Bus and Memory Bus Operation 
    - Boundary Scan
o   Pentium Processor (735\90, 815\100)
    - Chip Set Version of Pentium Processor (735\90, 815\100) 
    - Superscalar Architecture -
    - Enhanced Floating Point 
    - On-Chip 8K Code and 8K Data Caches
    - See Pentium Processor Family Data Book for More Information
o   Highly Flexible
    - 256K to 512K with Parity
    - 32-, 64-, or 128-Bit Wide Memory Bus
    - Synchronous, Asynchronous and Strobed Memory Bus Operation
    - Selectable Bus Widths, Line Sizes, Transfers and Burst Orders
o   Full Multiprocessing Support
    - Concurrent CPU, Memory Bus and Snoop Operations
    - Complete MESI Protocol
    - Internal/External Parity Generation/Checking
    - Supports Read For Ownership, Write-Allocation and Cache-to-Cache
      Transfers

**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
**GCK181        Universal PS/2 Chip Set                        c:Mar89
***Info:...
***Configurations:...
***Features:...
**HT11          Single 286 AT Chip [no datasheet]               <Aug90...
**HT12/+/A      Single 286 AT Chip with EMS support            c:Aug90...
**HT18          80386SX Single Chip                            c:Sep91...
**HT21          386SX/286 Single Chip (20 MHz)                 c:Aug91...
**HT22          386SX/286 Single Chip (25 MHz)                 c:Sep91...
**HT25          3-volt Core Logic for 386SX                    c:Dec92...
**HT35          Single-Chip Peripheral Controller [partial info]     ?...
**HTK320        386DX Chip Set                                 c:Sep91...
**HTK340        "Shasta" 486 Chip Set                          c:Jun92...
**Support Chips:
**HT44          Secondary Cache                                c:Jun92...
**Other:...
*HMC (Hulon Microelectronics)...
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*Motorola...
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*Unresearched:...
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