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**82395SX Smart Cache 12/17/90
***Notes:...
**82396SX Smart Cache 12/17/90...
**82485 Turbo Cache (and 485Turbocache) c90...
**82489DX Advanced Programmable Interrupt Controller 10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
**HT21 386SX/286 Single Chip (20 MHz) c:Aug91
***Info:
The HT21 is an advanced PC/AT compatible, single-chip 80386SX/80286
design solution. This highly integrated single chip allows simple,
low cost system design options while featuring high performance, low
power consumption, and minimum board space requirements. Advanced
memory management features include support for page mode, 2 or 4-way
interleaving in both pipelined and non-pipelined modes. The LIM 4.0
hardware implementation features dual sets of 32 registers with full
context support for highest performance Optimization of extended local
memory accesses. An advanced EMS hardware write-protect option is
provided. The HT21 supports 256K and 1M DRAMs in l by 1, 1 by 4, and 1
by 9 device configurations for up to 8MB of on-board system memory. A
flexible Shadow RAM option for System and Video BIOS as well as 8-
16-bit BIOS Options adds to overall design versatility.
A complete PC/AT compatible system with advanced features may be
implemented with minimal external support logic. The HT21 performs all
CPU and peripheral support functions in a single chip. Integrated
device functions include DMA Controllers, a Memory Mapper, Timers,
Counters, Interrupt Controllers, a Bus Controller and all supporting
circuitry for PC core logic requirements. The chip also contains all
the necessary address buffers, data transceivers, memory drivers,
parity checking and supporting circuitry for a complete high
performance computer solution. An asynchronous AT Bus clock allows for
a constant 8MHz Bus clock rate for highest bus device compatibility as
defined in IEEE Spec P996. In controlled bus applications the HT21
supports up to a 12 MHz Bus Clock rate. This device is packaged in a
208-pin Plastic Quad Flat Pack combining several external buffers into
this space saving solution.
***Configurations:...
***Features:...
**HT22 386SX/286 Single Chip (25 MHz) c:Sep91...
**HT25 3-volt Core Logic for 386SX c:Dec92...
**HT35 Single-Chip Peripheral Controller [partial info] ?...
**HTK320 386DX Chip Set c:Sep91...
**HTK340 "Shasta" 486 Chip Set c:Jun92...
**Support Chips:
**HT44 Secondary Cache c:Jun92...
**Other:...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
**W83759/A/F/AF Advanced VL-IDE Disk Controller <96
***Notes:...
***Info:
GENERAL DESCRIPTION
The W83759A is an advanced version of Winbond's popular VL-IDE
interface chip, the W83759. The W83759A retains all of the features
and compatibility of the W83759 (the chip meets the ANSI ATA 4.0
specification for IDE hard disk operation and the VESA VL-Bus 2.0
specification for PC local bus devices) while incorporating new
features to meet Enhanced IDE, SFF-8011, ATA-2, and Fast-ATA
specifications.
Supports Disk Capacity of Greater than 528 MB
The W83759A's driver can handle remapping from BIOS CHS mode to HDD
LBA mode. This scheme enables users to break the 528 MB per drive
barrier, allowing full use of BIOS INT13 CHS information in drives
with a capacity of up to 8.4 GB.
High Speed Host Transfer Rate
The W83759A supports Enhanced IDE PIO mode 3 and Fast ATA PIO mode 3
and 4 timing; jumper settings or driver programming can be used to
select the PIO mode and a 33 or 50 MHz VL-Bus clock. Different
programming timing can be selected for different drives in the same
system. The burst transfer rate is shown in the following table.
ATA PIO IDE COMMAND CYCLE BURST TRANSFER RATE IORDY THROTTLE
MODE TIME (nS) (MB/sec) CONTROL
0 600 3.33 Option
1 383 5.22 Option
2 240 8.33 Option
3 180 11.1 Required
4 120 16.6 Required
Dual IDE Channels
Like the W83759, the W83759A supports a secondary IDE address
(170h-177h/376h) and IRQ15 for applications with four hard disk
drives. Additionally, the primary and secondary channels can be
independently enabled or disabled by jumper settings or software
programming.
Non-disk IDE Peripherals
Because the command cycle can be programmed individually for each
drive and dual IDE channels are supported, non-disk IDE peripherals
(such as an ATAPI CD-ROM or tape drive) can be attached to the
secondary IDE without affecting the transfer rate of the ATA disk
drive. Sales of ATAPI IDE CD-ROMs are expected to grow rapidly as
these devices become a standard part of many users' desktop PC setup.
The W83759A provides all of the next-generation ATA-IDE requirements,
including support for high capacity disk drives, high speed host
transfers, multiple IDE peripherals, and non-disk IDE peripherals. It
makes high-performance, low-cost, easy-to-use IDE machines possible.
The W83759A is pin-to-pin backward compatible with the W83759. In
addition to the advanced features described above, the W83759A
supports automatic power-down, standby, and suspend APM power
management states for green PC applications. This new chip is packaged
in a 100-pin QFP.
The table below compares the W83759 and W83759A:
W83759 W83759A
Dual Channel IDE Yes Yes
8.4 G Max. Cap. Software Driving Software Driving
PIO Mode 3, 4 Control No Yes*
DMA Mode Control No Yes*
IOCHRDY Control No Yes*
IDE Timing Control Jumper Jumper or Driver*
Prefetch Control No Yes*
Power Saving Control No Yes*
ATAPI Protocol Software Driving Software Driving
>* All control is drive-by-drive (per drive selectability)
***Versions:...
***Features:...
**W83769 Local Bus IDE Solution <94...
**
**UARTS:
**W86C250A UART (equivalent of INS8C250A) [no datasheet]
**W86C450/P Universal Asynchronous Receiver/Transmitter <Jul89...
**W86C451 I/O controller for IBM PC/AT/XT <Jul89...
**W86C452 I/O controller for IBM PC/AT Jul89...
**W86C456 I/O controller [no datasheet] ?
**W860551/P UART with FIFO and Printer Port Controller <94...
**
**Other:...
*ZyMOS...
*General Sources:...
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