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**82489DX       Advanced Programmable Interrupt Controller    10/12/92
***Notes:...
***Info:
1.0 INTRODUCTION

The  82489DX  Advanced   Programmable  Interrupt  Controller  provides
multiprocessor interrupt management, providing both static and dynamic
symmetrical interrupt distribution across all processors.

The main  function of the  82489DX is to provide  interrupt management
across all  processors. This  dynamic interrupt  distribution includes
routing of the interrupt to the lowest-priority processor. The 82489DX
works in  systems with multiple  I/O subsystems, where  each subsystem
can  have  its  own  set  of  interrupts.   This  chip  also  provides
inter-processor interrupts,  allowing any  processor to  interrupt any
processor or set  of processor. Each 82489DX I/O  init interrupt input
pin is individually  programmable by software as either  edge or level
triggered.  The interrupt vector and interrupt steering information an
be specified  per pin.  A  32-bit wide timer  is provided that  can be
programmed to interrupt the local processor.  the timer can be used as
a counter to provide a time base to software running on the processor,
or to generate  time slice interrupts locally to  that processor.  the
82489DX   provides   32-bit   software    access   to   its   internal
registers. Since no  82489DX register read have any  side effects, the
82489DX registers  can be aliased  to a  user read-only page  for fast
user access (e.g., performance monitoring timers).

The 82489DX  supports a generalized naming/addressing  scheme that can
be tailored by  software to fit a variety of  system architectures and
usage  models.   It  also  supports 8259A  compatibility  by  becoming
virtually  transparent with  regard to  an externally  connected 8259A
style controller, making the 8259A visible to software.

***Versions:...
***Features:...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
**82C898         System/Power Management Controller (non-cache)c:Nov94
***Notes:...
***Info:...
***Configurations:...
***Features:...
**
**Support Chips:
**82C601/2       Buffer Devices                                 <Nov94...
**82C822         PCIB (VLB-to-PCI bridge)                         c:94...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
**W83977F/G/AF/AG WINBOND I/O (Multi I/O)                          c97
***Info:...
***Versions:...
***Features:
General
o  Plug & Play 1.0A Compliant
o  Support 13 IRQs, 4 DMA channels, full 16-bit addresses decoding
o  Capable of ISA Bus IRQ Sharing
o  Compliant with Microsoft PC97 Hardware Design Guide
o  Support DPM (Device Power Management), ACPI
o  Programmable configuration settings
o  24 or 14.318 Mhz clock input

FDC
o  Compatible with IBM PC AT disk drive systems
o  Variable write pre-compensation with track selectable capability
o  Support vertical recording format
o  DMA enable logic
o  16-byte data FIFOs
o  Support floppy disk drives and tape drives
o  Detects all overrun and underrun conditions
o  Built-in address mark detection circuit to simplify the read 
   electronics
o  FDD anti-virus functions with software write protect and FDD write 
   enable signal (write data signal was forced to be inactive)
o  Support up to four 3.5-inch or 5.25-inch floppy disk drives
o  Completely compatible with industry standard 82077
o  360K/720K/1.2M/1.44M/2.88M format; 250K, 300K, 500K, 1M, 2M bps 
   data transfer rate
o  Support 3-mode FDD, and its Win95 driver

UART
o  Two high-speed 16550 compatible UARTs with 16-byte send/receive 
   FIFOs
o  3rd UART with 32-byte send/receive FIFO is supported for IR 
   function [W83977AF/AG only]
o  MIDI compatible
o  Fully programmable serial-interface characteristics:
   - 5, 6, 7 or 8-bit characters
   - Even, odd or no parity bit generation/detection
   - 1, 1.5 or 2 stop bits generation
o  Internal diagnostic capabilities:
   - Loop-back controls for communications link fault isolation
   - Break, parity, overrun, framing error simulation
o  Programmable baud generator allows division of 1.8461 Mhz and 
   24 Mhz by 1 to (2^16-1)
o  Maximum baud rate up to 921k bps for 14.769 Mhz and 1.5M bps 
   for 24 Mhz

Infrared
o  Support IrDA version 1.0 SIR protocol with maximum baud rate up to 
   115.2K bps
o  Support SHARP ASK-IR protocol with maximum baud rate up to 57,600 
   bps
o  Support IrDA version 1.1 MIR (1.152M bps) and FIR (4M bps) protocol 
   [W83977AF/AG only]
   - Single DMA channel for transmitter or receiver
   - 3rd UART with 32-byte FIFO is supported in both TX/RX 
     transmission [W83977AF/AG only]
   - 8-byte status FIFO is supported to store received frame status 
     (such as overrun CRC error, etc.)
o  Support auto-config SIR and FIR [W83977AF/AG only]

Parallel Port
o  Compatible with IBM parallel port
o  Support PS/2 compatible bi-directional parallel port
o  Support Enhanced Parallel Port (EPP) 
   − Compatible with IEEE 1284 specification
o  Support Extended Capabilities Port (ECP) 
   − Compatible with IEEE 1284 specification
o  Extension FDD mode supports disk drive B; and Extension 2FDD mode 
   supports disk drives A and B through parallel port
o  Enhanced printer port back-drive current protection

Advanced Power Management (APM) Controlling
o  Power turned on when RTC reaches a preset date and time
o  Power turned on when a ring pulse or pulse train is detected on the 
   PHRI, or when a high to low transition on PWAKIN1, or PWAKIN2 
   input signals
o  Power turned on when PANSW input signal indicates a switch on event
o  Power turned off when PANSW input signal indicates a switch off 
   event
o  Power turned off when a fail-safe event occurs (power-save mode 
   detected but system is hung up)
o  Power turned off when software issues a power off command

Keyboard Controller
o  8042 based with optional F/W from AMIKKEY-2, Phoenix MultiKey/42 or 
   customer code
o  with 2K bytes of programmable ROM, and 256 bytes of RAM
o  Asynchronous Access to Two Data Registers and One status Register
o  Software compatibility with the 8042 and PC87911 microcontrollers
o  Support PS/2 mouse
o  Support port 92
o  Support both interrupt and polling modes
o  Fast Gate A20 and Hardware Keyboard Reset
o  8 Bit Timer/ Counter; support binary and BCD arithmetic
o  6, 8, 12, or 16 Mhz operating frequency (16 Mhz available only if 
   input clock rate = 14.318 Mhz)

Real Time Clock
o  27 bytes of clock, On-Now, and control/status register (14 bytes in 
   Bank 0 and 13 bytes in Bank 2); 242 bytes of general purpose RAM
o  BCD or Binary representation of time, calendar, and alarm registers
o  Counts seconds, minutes, hours, days of week, days of month, month, 
   year, and century
o  12-hour/ 24-hour clock with AM/PM in 12-hour mode
o  Daylight saving time option; automatic leap-year adjustment
o  Dedicated alarm (Alarm B) for On-Now function
o  Programmable delay-time between panel switch off and power supply 
   control
o  Software control power-off; various and maskable events to activate 
   system Power-On
o  System Management Interrupt (SMI ) for panel switch power-off event

General Purpose I/O Ports
o  14 programmable general purpose I/O ports; 6 dedicate, 8 optional
o  General purpose I/O ports can serve as simple I/O ports, interrupt 
   steering inputs, watching dog timer output, power LED output, 
   infrared I/O pins, general purpose address decoder, KBC control I/O
   pins.

Package
o  128-pin PQFP


**W83977TF        WINBOND I/O (Multi I/O)                          c97...
**W83977EF        WINBOND I/O (Multi I/O)                          <98...
**W83977ATF       WINBOND I/O (Multi I/O)                          <98...
**
**Disk Controller:
**W83759/A/F/AF   Advanced VL-IDE Disk Controller                  <96...
**W83769          Local Bus IDE Solution                           <94...
**
**UARTS:
**W86C250A  UART (equivalent of INS8C250A) [no datasheet]
**W86C450/P Universal Asynchronous Receiver/Transmitter         <Jul89...
**W86C451   I/O controller for IBM PC/AT/XT                     <Jul89...
**W86C452   I/O controller for IBM PC/AT                         Jul89...
**W86C456   I/O controller [no datasheet]                            ?
**W860551/P UART with FIFO and Printer Port Controller             <94...
**
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*ZyMOS...
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