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**M1521/23 Aladdin III 50-66MHz <Nov96
***Info:...
***Configurations:...
***Features:...
**M1531/33/43 Aladdin IV & IV+ 50-83.3MHz <05/28/97...
**M1541/42/33/43 Aladdin V & V+ 50-100MHz ?...
**M1561/43/35D Aladdin 7 ArtX [no datasheet, some info] 11/08/99...
**M6117 386SX Single Chip PC <97...
**
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**M1535/D South Bridge ?...
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*AMD . . . . . . . [no datasheets, some info]...
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*Intel...
**82485 Turbo Cache (and 485Turbocache) c90
***Notes:...
***Info:
The 82485 is a second-level cache controller designed to improve the
performance of Intel486 Microprocessor systems. One 82485 cache
controller supports 64K or 128K bytes of second level cache memory
that maps to the entire 4 Gigabytes of the Intel486 microprocessor
address space. The controller is completely software transparent. One
controller plus SRAMs provides a 64K or a 128K cache. External EPROM
can be cached yet remain write protected. The 82485 is fully
compatible with the Intel486 microprocessor. All Intel486 CPU bus
cycles and timings are supported.
A complete, optional second level cache controller using the 82485 is
available as the 485Turbocache Module from Intel (data sheet order
number 240722).
2.0 FUNCTIONAL DESCRIPTION
2.1 Introduction
The 82485 is a single ported, two-way set associative cache controller
designed specifically to interface with the Intel486 microprocessor.
The controller supports either a sectored configuration (two lines per
tag) or a non-sectored configuration (one line per tag). The 82485
will directly support a nonsectored 64K data cache or a 128K sectored
data cache. Both the 64K and 128K configurations are able to map the
entire 4 gigabytes of the Intel486 microprocessor address space. The
82485 interfaces directly to the Intel486 microprocessor. All Intel-
486 CPU bus cycles and timings are supported. The 82485 also supports
0 wait state processor operation when there is a cache hit and has
provisions to support invalidation cycles, BOFF# cycles, and premature
BLAST# terminations. The controller is look aside (monitors bus act-
ivity in parallel to the processor) and write through (all writes pro-
pagate to the system bus), so it supports the same cache consistency
mechanisms as the Intel486 CPU. The controller also provides a safe
method to cache ROM BIOS through the use of a write protect pin and a
write protect strapping option.
The data cache (Static RAM) resides external to the 82485. The 82485
provides all controls for the SRAMs. No external latches or tran-
ceivers are required. The 82485 output buffers support up to eight
SRAMs. A 64K cache can be designed with only five components; nine
components for a 128K cache. Two-way set associativity is provided by
dual banked SRAMs. Data parity is supported.
The 82485 can be used to design a custom second level cache
configuration. For an easier system design and higher integration, the
82485M Turbocache can be used (see data sheet order number 240722).
This module is a complete second level cache in one package. It
consists of a single 82485 cache controller and SRAM to provide a
complete 64K or 128K second level Intel486 microprocessor second level
cache.
***Versions:...
***Features:...
**82489DX Advanced Programmable Interrupt Controller 10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
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*Winbond...
**W83977F/G/AF/AG WINBOND I/O (Multi I/O) c97
***Info:
GENERAL DESCRIPTION
This data sheet covers two products: W83977F/G, and W83977AF/AG whose
pin assignment, and most of the functions are the same. W83977AF/AG is
an advanced version of W83977F/G featuring the FIR function.
W83977F/G, W83977AF/AG are evolving products from Winbond’s most
popular I/O chip W83877F -- which integrates the disk drive adapter,
serial port (UART), IrDA 1.0 SIR, parallel port, configurable
plug-and-play registers in one chip --- plus additional powerful
features: ACPI, 8042 keyboard controller with PS/2 mouse support, Real
Time Clock, 14 general purpose I/O ports, full 16-bit address
decoding, TV remote IR (Consumer IR, supporting NEC, RC-5, extended
RC-5, and RECS-80 protocols). In addition, W83977AF/AG provides the
functions of IrDA 1.1 (MIR for 1.152M bps or FIR for 4M bps).
The disk drive adapter functions of W83977F/G, W83977AF/AG include a
floppy disk drive controller compatible with the industry standard
82077/ 765, data separator, write pre-compensation circuit, decode
logic, data rate selection, clock generator, drive interface control
logic, and interrupt/ DMA logic. The wide range of functions
integrated onto the W83977F/G, W83977AF/AG greatly reduces the number
of components required for interfacing with floppy disk drives. The
W83977F/G, W83977AF/AG supports up to four 360K, 720K, 1.2M, 1.44M, or
2.88M disk drives and data transfer rates of 250 Kb/s, 300 Kb/s, 500
Kb/s,1 Mb/s, and 2 Mb/s.
The W83977F/G, W83977AF/AG provide two high-speed serial communication
ports (UARTs), one of which supports serial Infrared communication.
Each UART includes a 16-byte send/receive FIFO, a programmable baud
rate generator, complete modem control capability, and a processor
interrupt system. Both UARTs provide legacy speed with baud rate
115.2k and provide advanced speed with baud rate 230k, 460k, and 921k
bps which support higher speed modems. W83977AF/AG alone provides
independent 3rd UART (32-byte FIFO) dedicated for IR function.
The W83977F/G, W83977AF/AG supports one PC-compatible printer port
(SPP), Bi-directional Printer port (BPP) and also Enhanced Parallel
Port (EPP) and Extended Capabilities Port (ECP). Through the printer
port interface pins, also available are: Extension FDD Mode and
Extension 2FDD Mode allowing one or two external floppy disk drives to
be connected.
The configuration registers support mode selection, function
enable/disable, and power down function selection. Furthermore, the
configurable PnP features are compatible with the plug-and-play
feature demand of Windows 95TM, which makes system resource allocation
more efficient than ever.
W83977F/G, W83977AF/AG provides functions that comply with ACPI
(Advanced Configuration and Power Interface), which includes support
of legacy and ACPI power management through SMI or SCI function
pins. W83977F/G, W83977AF/AG also has auto power management to reduce
power consumption.
The keyboard controller is based on 8042 compatible instruction set
with a 2K Byte programmable ROM and a 256-Byte RAM bank. Keyboard BIOS
firmware is available with optional AMIKEY-2, Phoenix MultiKey/42, or
customer code.
The W83977F/G, W83977AF/AG provides a set of flexible I/O control
functions to the system designer through a set of General Purpose I/O
ports. These GPIO ports may serve as simple I/O or may be individually
configured to provide a pre-defined alternate function.
W83977F/G, W83977AF/AG is made to fully comply with Microsoft PC97
Hardware Design Guide. IRQs, DMAs, and I/O space resource are flexible
to adjust to meet ISA PnP requirement. Full 16-bit address decoding is
also provided. Moreover W83977F/G, W83977AF/AG is made to meet the
specification of PC97‘s requirement in the power management: ACPI and
DPM (Device Power Management).
***Versions:...
***Features:...
**W83977TF WINBOND I/O (Multi I/O) c97...
**W83977EF WINBOND I/O (Multi I/O) <98...
**W83977ATF WINBOND I/O (Multi I/O) <98...
**
**Disk Controller:
**W83759/A/F/AF Advanced VL-IDE Disk Controller <96...
**W83769 Local Bus IDE Solution <94...
**
**UARTS:
**W86C250A UART (equivalent of INS8C250A) [no datasheet]
**W86C450/P Universal Asynchronous Receiver/Transmitter <Jul89...
**W86C451 I/O controller for IBM PC/AT/XT <Jul89...
**W86C452 I/O controller for IBM PC/AT Jul89...
**W86C456 I/O controller [no datasheet] ?
**W860551/P UART with FIFO and Printer Port Controller <94...
**
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