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**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91
***Notes:...
***Info:...
***Features:...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
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**SN74LS610/2 IBM AT: SN74LS610, SN74LS612 Memory Mappers <84
***Notes:...
***Info:
Each 'LS610 and 'LS612 memory mapper integrated circuit contains a
4-line to 16-line decoder, a 16-word by 12-bit RAM, 16 channels of
2-line to 1-line multiplexers, and other miscellaneous circuitry on a
monolithic chip. Each 'LS610 also contains 12 latches with an enable
control.
The memory mappers are designed to expand a microprocessor's memory
addressing capability by eight bits. Four bits of the memory address
bus (see System Block Diagram)[see datasheet] can be used to select
one of 16 map registers that contain 12 bits each. these 12 bits are
presented to the system memory address bus through the map output
buffers along with the unused memory address bits from the CPU.
However, addressable memory space without reloading the map registers
is the same as would be available with the memory mapper left out.
The addressable memory space is increased only by periodically
reloading the map registers from the data bus. This configuration
lends itself to memory utilization of 16 pages of 2^(n-4) registers
each without reloading (n - number of address bits available from
CPU).
These devices have four modes of operation: read, write, map, and
pass. Data may be read from or loaded into the map register selected
by the register select inputs (RS0 thru RS3) under control of R/W
whenever chip select (CS) is low. The data I/O takes place on the data
bus DO thru D7. The map operation will output the contents of the map
register selected by the map address inputs (MA0 thru MA3) when CS is
high and MM (map mode control) is low. The 'LS612 output stages are
transparent in this mode, while the 'LS610 outputs may be transparent
or latched. When CS and MM are both high (pass mode), the address bits
on MA0 thru MA3 appear at M08-MO11, respectively (assuming appropriate
latch control) with low levels in the other bit positions on the map
outputs.
***Versions:...
***Features:...
**TACT82000 3-Chip 286 [no datasheet] c89...
**TACT82411 Snake Single-Chip AT Controller c90...
**TACT82S411 Snake+ Single-Chip AT Controller [no datasheet] c91...
**TACT83000 AT 'Tiger' Chip Set (386) c89...
**TACT84500 AT Chip Set (486, EISA) [no datasheet, some info] c91...
**Other:...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
**W83877TF/TG/TD WINBOND I/O (Multi I/O) c97
***Info:
GENERAL DESCRIPTION
W83877TF/TG is an enhanced version from Winbond's most popular I/O
chip W83877F --- which integrates the disk drive adapter, serial port
(UART), IrDA 1.0 SIR, parallel port, configurable Plug-and-Play
registers for the whole chip --- plus additional powerful features:
ACPI / legacy power management, serial IRQ, and IRQ sharing.
The disk drive adapter functions of W83877TF/TG include a floppy disk
controller compatible with the industry standard 82077/765, data
separator, write pre-compensation circuit, decode logic, data rate
selection, clock generator, drive interface control logic, interrupt
and DMA logic. The wide range of functions integrated into W83877TF/TG
greatly reduces the number of components required for interfacing with
floppy disk drives. W83877TF/TG supports four 360K, 720K, 1.2M, 1.44M,
or 2.88M disk drives and data transfer rates of 250 Kb/S, 300 Kb/S,
500 Kb/S,1 Mb/S, and 2 Mb/S.
W83877TF/TG provides two high-speed serial communication ports
(UARTs), one of which supports serial Infrared communication. Each
UART includes a 16-byte send/receive FIFO, a programmable baud rate
generator, complete modem control capability, and a processor
interrupt system. One of the UARTs support infrared (IR) IrDA1.0. Both
UARTs provide legacy speed with baud rate up to 115.2K and provide
advanced speed with baud rate up to 230k, 460k, and 921k bps which
support higher speed Modems.
W83877TF/TG supports one PC-compatible printer port (SPP),
Bi-directional printer port (BPP) and also Enhanced Parallel Port
(EPP) and Extended Capabilities Port (ECP). Through the printer port
interface pins, also available are: Extension FDD Mode and Extension
2FDD Mode allowing one or two external floppy disk drives to be
connected. This function is especially valuable for notebook computer
applications.
Winbond W83877TF/TG provides functions that comply with ACPI (Advanced
Configuration and Power Interface), which includes support of legacy
and ACPI power management through SMI or SCI function pins. One
24-bits power management timer is implemented with the carry notify
interrupt. W83877TF/TG also has auto power management mode to reduce
the power consumption.
The serial IRQ for PCI architecture is supported, ISA IRQs
(IRQ1~IRQ15) can be cascaded into one IRQSER pin. W83877TF/TG also
features ISA bus IRQ sharing and allows two or more devices to share
the same IRQ pin.
W83877TF/TG is made to fully comply with Microsoft PC97 Hardware
Design Guide. IRQs, DMAs, and I/O space resources are flexible to
adjust to meet ISA PnP requirement. Moreover W83877TF/TG is made to
meet the specification of PC97's requirement in the power management:
ACPI and DPM (Device Power Management).
The configuration registers support mode selection, function
enable/disable, and power down function selection. Furthermore, the
configurable PnP registers are compatible with the Plug-and-Play
feature demand of Windows 95 , which makes system resource allocation
more efficient than ever.
Another benefit of W83877TF/TG is that it is pin-to-pin compatible to
W83877F, and all of the 100-pin Winbond I/O IC family. Thus makes the
design of applications very convenient and flexible.
***Versions:...
***Features:...
**W83977F/G/AF/AG WINBOND I/O (Multi I/O) c97...
**W83977TF WINBOND I/O (Multi I/O) c97...
**W83977EF WINBOND I/O (Multi I/O) <98...
**W83977ATF WINBOND I/O (Multi I/O) <98...
**
**Disk Controller:
**W83759/A/F/AF Advanced VL-IDE Disk Controller <96...
**W83769 Local Bus IDE Solution <94...
**
**UARTS:
**W86C250A UART (equivalent of INS8C250A) [no datasheet]
**W86C450/P Universal Asynchronous Receiver/Transmitter <Jul89...
**W86C451 I/O controller for IBM PC/AT/XT <Jul89...
**W86C452 I/O controller for IBM PC/AT Jul89...
**W86C456 I/O controller [no datasheet] ?
**W860551/P UART with FIFO and Printer Port Controller <94...
**
**Other:...
*ZyMOS...
*General Sources:...
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