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**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91
***Notes:...
***Info:...
***Features:...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
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**82C381/382 HiD/386 (386DX) c:89
***Info:
The HiD/386 Chipset, 82C381 and 82C382D, support high integration
implementations of Direct Mapped Cache with 32KB/64KB/128KB Cache for
25 and 33 MHz 386/AT Personal Computers. Combined with the 82C206
Integrated Peripherals Controller, it integrates the 386/AT mother-
board to under 20 devices, plus memory. It is designed to cost reduce
discrete and CHIPS’CS8230 based 82385 Cache 386/AT designs, as well as
boost the performance of these designs to 33 MHz, with >64KB Cache.
The 82681 provides system control logic and data bus conversion logic.
The control logic consists of 386 CPU control logic, AT Bus cycle
control, 387 Numeric Processor control logic, synchronous clock divide
logic and control of the local peripheral bus. The data bus conversion
logic consists of various 8, 16, 32 bit conversions for ROM cycles, AT
bus cycles and memory cycles.
The 820382D performs the Memory Management functions for the HiD/AT
chipset. It is designed to optimize cost of high performance 386/AT
systems with 64KB, l28KB or larger Direct Mapped Cache Memory. It also
implements logic to maintain compatibility in the AT environment . It
provides a Page Interleave backend for main DRAM memory, in order to
improve performance during miss cycles. It also has features for
reducing system cost.
It minimizes Cache Memory cost by allowing the use of slow SRAM; by
supporting single EPROM BIOS configurations; putting DRAM on the local
bus and consequently reducing DRAM speeds by 15ns typically; and by
remapping 256K of DRAM between 640K and 1024K to top of main memory.
It provides a very flexible implementation of paging for the main DRAM
memory. For even bank configurations, it provides 2-way or 4-way
interleaving; for odd banks it provides paging. This provides a
flexible approach to increasing the size of the local memory as
software demands increase, without imposing a penalty on performance.
Finally, memory performance is optimized by shadow RAM techniques for
BIOS ROMs; concatenated pages for multiple hank configurations; paging
for odd banks; and variable page size for larger DRAMs.
System Architecture
The HiD/AT chipset is compatible with the 82C206 Integrated
Peripherals Controller. Consequently, with the 82C206, a very high
integration and very high performance 386/AT can be implemented. A
typical motherboard can be designed with less than 20 devices plus
memory.
For larger AT designs, targeted at file-servers and departmental
computers, designs with 8 or more slots can be supported with external
AT bus drivers.
***Configurations:...
***Features:...
**82C391/392 386WB PC/AT Chipset (386DX) <Dec90...
**82C461/462 Notebook PC/AT chipset [no datasheet] ?...
**82c463 SCNB Single Ship Notebook c:92...
**82c465MV/A/B Single-Chip Mixed Voltage Notebook Solution <Oct97...
**82C481?/482? HiP/486 & HiB/486 [no datasheet] Oct89...
**82C491/392 486WB PC/AT Chipset <04/21/91...
**82C493/392 486SXWB <10/21/91...
**82C495SX/392SX LCWB PC/AT chipset [no datasheet] ?...
**82C495SLC DXSLC 386/486 Low Cost Write Back c:92...
**82C495XLC PC/AT Chip Set c:93...
**82c496A/B DXBB PC/AT Chipset <Mar92...
**82C496/7 DXBB PC/AT Chipset (Cached) <01/16/92...
**82C498 DXWB PC/AT chipset [no datasheet] ?...
**82C499 DXSC DX System Controller c:93...
**82C546/547 Python PTM3V c:94...
**82C556/7/8 Viper [no datasheet] ?...
**82C556/7/8N Viper-N Viper Notebook Chipset <05/25/95...
**82C556M/7M/8E Viper-N+ Viper Notebook Chipset c:96...
**82C566/7/8 Viper-Max Chipset Scalable MultiMedia PC Solution ?...
**82C571/572 486/Pentium c:93...
**82C576/7/8 Viper Xpress [no datasheet] ?...
**82C576/8/9 Viper XPress+ [no datasheet, some info] <01/16/97...
**82C596/597 PTMAWB Pentium Adaptive Write-back (Cobra) c:93...
**82C650/1/2 Discovery (Pentium Pro) [no datasheet] ?...
**82C681/2/6/7 386/486WB EISA c:92...
**82C683 386/486AWB EISA [no datasheet] ?...
**82C693/6/7 Pentium uP Write Back Cache EISA c:93...
**82C700 FireStar c:97...
**82C701 FireStar Plus c:97...
**82C750 Vendetta [no datasheet] ?...
**82c801 SCWB2 DX Single Chip Solution c:92...
**82C802 SCWB2 PC/AT Single Chip [no datasheet] ?...
**82C802G/GP System/Power Management Controller (cached) c:93...
**82C895 System/Power Management Controller (cached) c:Sep94...
**82C898 System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2 Buffer Devices <Nov94...
**82C822 PCIB (VLB-to-PCI bridge) c:94...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
**W83877TF/TG/TD WINBOND I/O (Multi I/O) c97
***Info:
GENERAL DESCRIPTION
W83877TF/TG is an enhanced version from Winbond's most popular I/O
chip W83877F --- which integrates the disk drive adapter, serial port
(UART), IrDA 1.0 SIR, parallel port, configurable Plug-and-Play
registers for the whole chip --- plus additional powerful features:
ACPI / legacy power management, serial IRQ, and IRQ sharing.
The disk drive adapter functions of W83877TF/TG include a floppy disk
controller compatible with the industry standard 82077/765, data
separator, write pre-compensation circuit, decode logic, data rate
selection, clock generator, drive interface control logic, interrupt
and DMA logic. The wide range of functions integrated into W83877TF/TG
greatly reduces the number of components required for interfacing with
floppy disk drives. W83877TF/TG supports four 360K, 720K, 1.2M, 1.44M,
or 2.88M disk drives and data transfer rates of 250 Kb/S, 300 Kb/S,
500 Kb/S,1 Mb/S, and 2 Mb/S.
W83877TF/TG provides two high-speed serial communication ports
(UARTs), one of which supports serial Infrared communication. Each
UART includes a 16-byte send/receive FIFO, a programmable baud rate
generator, complete modem control capability, and a processor
interrupt system. One of the UARTs support infrared (IR) IrDA1.0. Both
UARTs provide legacy speed with baud rate up to 115.2K and provide
advanced speed with baud rate up to 230k, 460k, and 921k bps which
support higher speed Modems.
W83877TF/TG supports one PC-compatible printer port (SPP),
Bi-directional printer port (BPP) and also Enhanced Parallel Port
(EPP) and Extended Capabilities Port (ECP). Through the printer port
interface pins, also available are: Extension FDD Mode and Extension
2FDD Mode allowing one or two external floppy disk drives to be
connected. This function is especially valuable for notebook computer
applications.
Winbond W83877TF/TG provides functions that comply with ACPI (Advanced
Configuration and Power Interface), which includes support of legacy
and ACPI power management through SMI or SCI function pins. One
24-bits power management timer is implemented with the carry notify
interrupt. W83877TF/TG also has auto power management mode to reduce
the power consumption.
The serial IRQ for PCI architecture is supported, ISA IRQs
(IRQ1~IRQ15) can be cascaded into one IRQSER pin. W83877TF/TG also
features ISA bus IRQ sharing and allows two or more devices to share
the same IRQ pin.
W83877TF/TG is made to fully comply with Microsoft PC97 Hardware
Design Guide. IRQs, DMAs, and I/O space resources are flexible to
adjust to meet ISA PnP requirement. Moreover W83877TF/TG is made to
meet the specification of PC97's requirement in the power management:
ACPI and DPM (Device Power Management).
The configuration registers support mode selection, function
enable/disable, and power down function selection. Furthermore, the
configurable PnP registers are compatible with the Plug-and-Play
feature demand of Windows 95 , which makes system resource allocation
more efficient than ever.
Another benefit of W83877TF/TG is that it is pin-to-pin compatible to
W83877F, and all of the 100-pin Winbond I/O IC family. Thus makes the
design of applications very convenient and flexible.
***Versions:...
***Features:...
**W83977F/G/AF/AG WINBOND I/O (Multi I/O) c97...
**W83977TF WINBOND I/O (Multi I/O) c97...
**W83977EF WINBOND I/O (Multi I/O) <98...
**W83977ATF WINBOND I/O (Multi I/O) <98...
**
**Disk Controller:
**W83759/A/F/AF Advanced VL-IDE Disk Controller <96...
**W83769 Local Bus IDE Solution <94...
**
**UARTS:
**W86C250A UART (equivalent of INS8C250A) [no datasheet]
**W86C450/P Universal Asynchronous Receiver/Transmitter <Jul89...
**W86C451 I/O controller for IBM PC/AT/XT <Jul89...
**W86C452 I/O controller for IBM PC/AT Jul89...
**W86C456 I/O controller [no datasheet] ?
**W860551/P UART with FIFO and Printer Port Controller <94...
**
**Other:...
*ZyMOS...
*General Sources:...
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