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**WD76C20x   Floppy, RTC, IDE and Support Logic Device       <11/25/91
***Info:
GENERAL DESCRIPTION

The  WD76C20 is  a member  of  the WD7600  chip set  which provides  a
cost-effective,  power-efficient   solution  to  PC   systems  design,
especially those  relating to "lap-top" devices. The  set includes the
WD76C10, the WD76C20, and the WD76C30 as shown in Figure 1-1. Together
these chips  provide all necessary  logic to build a  fully integrated
system board for several  varieties of IBM PC/AT compatibles including
systems using 80286, 80386SX, and 80C286 processors.

As  part  of  this  chip  set, the  WD76C20  provides  these  integral
functions:
o Bus Interface Logic
o IDE Interface
o Chip Select Logic
o Floppy Disk Controller
o Real Time Clock
o Suspend/Resume Logic

The Floppy  Disk Controller (FDC) component  provides necessary timing
and signalling between the host  processor peripheral bus and a floppy
disk drive through a cable connector.

The Real Time Clock  component provides calendar and clock information
for the system.

The IDE Interface  controls buffering between the system's  AT Bus and
PC/AT compatible IDE drive interface.

The  Bus  Interface  Logic  controls  buffering of  data  between  the
system's AT Bus and the WD76C20.

The  Chip Select  Logic section  provides decoding  for  selected chip
functions both within the WD76C20 and on the PC/AT motherboard.

Suspend/Resume  Logic provides  support  for chip  set power-down  and
resume sequences.

***Versions:...
***Features:
o   84-pin PLCC and PQFP packages
o   5V supply requirement (WD76C20) 
    3.3V supply requirement (WD76C20LV)
o   3.0V battery backup supply for the RTC and 114 byte SRAM (WD76C20) 
    2.4V battery backup supply for the RTC and 114 byte SRAM 
    (WD76C20LV)
o   Implemented in a low-power, high-performance, 1.25 micron CMOS 
    technology process
o   Floppy Disk Controller (FDC) software transparent power-down mode 
    with low standby ICC current. FOC features:
    - 256 tracks support
    - 100% software compatible with NEC 765A
    - Integrated high-performance DPLL data separator:
       - 125, 250, 300, 500 Kb/sec and 1 Mb/sec data rates
       - Option to select 150 Kb/sec FM and 300 Kb/sec MFM data 
         rates only
    - Automatic Write Precompensation:
       - Defeat option
       - Inner track value of 125 or 187 ns pin selectable
    - On chip clock generation:
       - 2 TTL clock inputs, or 
       - Single 16 or 32 MHz crystal circuit and one TTL clock input
    - Power Qualified Reset
       - Enable PQR in W076C20
       - Disable PQR in W076C20LV
    - Host interface read/write accesses compatible with 80286 
      microprocessors at speeds up to 12 MHz with 0 wait states
    - Direct floppy disk drive interface - no buffers needed
       - 48 mA sink output drivers
       - Schmitt Trigger input line receivers
    - FDC direct PC XT/AT interface compatibility
       - Floppy Control and Operations Registers on chip
       - In PC/AT mode, provides required signal qualification to DMA 
         channel
       - IBM BIOS compatible
       - Dual-speed spindle drive support
    - PS/2 type drive support
o   Real Time Clock (RTC) features:
    - Software compatible with Motorola MC146818A.
    - Internal time base and oscillator circuitry 
    - Counts seconds, minutes, and hours
    - Counts days of the week, date, month, and year
    - Time base input for 32.768 KHz square wave
    - Time base oscillator for parallel resonant crystals
    - Binary or BCD representation of time, calendar, and alarm
    - 12- or 24-hour clock with AM and PM in 12-hour mode
    - Daylight savings time option
    - Automatic leap year compensation
    - Interfaced with software as 128 RAM locations
    - 114 bytes at general purpose RAM
    - Status bit indicates data integrity
    - Bus compatible interrupt signals (IRQ)
    - Three interrupts are separately software maskable and testable:
       - Time-at-day alarm - once-per-second to once-per-day
       - Periodic interrupt rates tram 122 us to 500 ms
       - End-at-clock update cycle

**WD76C30x   Perip. Ctrl, Interrupt Multiplex, and Clock Gen <11/18/91...
**WD7615     Desktop Buffer Manager                          <04/15/92...
**WD7625     Desktop Buffer Manager                          <10/01/92...
**WD8120LV   Super I/O [no datasheet]                                ?
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