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**M6117 386SX Single Chip PC <97
***Notes:...
***Info:...
***Versions:...
***Features:
o Static Intel 386SX compatible Core
- Operating Power Supply 5.0V
- Operating frequency 25Mhz to 40Mhz
o Memory Controller
- Supports EDO DRAM
- Supports on board memory size up to 16M bytes for 386SX or 64M
bytes upgrade system using 256K, 512K, 1M, 4M or 16M SIMMs
- Supports up to 4-bank DRAM interface
- Page interleave DRAM access for FP mode
- Programmable shadow RAM from A to B segment in 128K byte and C
to F segment in 32K byte unit
- Provides "RAS only" refresh or "CAS before RAS” refresh types
- Parity generation and checking
o Peripheral Interface
- Includes 2 cascaded 8237 DMA controllers
- Includes 1 74612 memory mapper
- Includes 2 cascaded 8259 interrupt controllers
- Includes 1 8254 programming counter
o ISA Interface
- Executes cycles for requests from CPU, DMA and ISA bus master
- Assembles or de-assembles data for multiple bus cycle or
unmatched data width
- Generates refresh signals to ISA slots during DRAM refresh
cycles
o Built-in RTC
- Internal Real Time Clock that provides 128 byte CMOS RAM
o Programmable 2 channels chip select
- Provide chip select for memory or I/O device without external
address decode random logic
o Built-In PS2/AT Keyboard Controller
- Internal PS2/AT keyboard controller and mouse
o PMU interface
- Supports CPU SMM mode, SMI feature
- Supports APM control
- Provides External Suspend mode switch
- Provides four (4) system states for power saving (On, Doze,
Standby, Suspend)
- Supports RTC alarm wake up control
o Expandable GPI/O signals
- Provides sixteen External power control input and output signals
- Provides sixteen independent pin for general purpose input and
output signals
o Watchdog timer
- When timer times out , a system reset or NMI or IRQ happens
o IDE interface
- Provides a decoder for external IDE connection
o Packaging
- 208-pin PQFP package
**
**Support Chips:
**M1535/D South Bridge ?...
**
**May not exist:...
**Later Chipsets:...
**Other:
M2228 Video
M2301 Video
M2302 Video
M2308 Video
M2401 Video
M3125 Video
M3135 Video (super VGA)
M3143 Video
M3145 PCI Video
M3145 VLB/PCI 3D Video
M3147V PCI Video
M3149 Video
M3151 PCI 3D Video, 4MB MAX
M3307 MPEG Video Decoder Chip
M3309 MPEG-II Video Decoder Chip
M3321 MPEG-II A/V Decoder Chip
M3351 MPEG-II Video Decoder Chip
M4803 PCI EIDE Controller
M5105 VLB Super I/O Controller FDD/HDD/LPT/2xCOM/GAME
M5113 Superset of 5105, with PnP, ECP/EPP LPT and IR port
M5119 Super I/O
M5123 Super I/O PnP/2xCOM/IR port/Keyboard (For Phoenix BIOS)
M5125 same as M5123 but for AMI
M513? Super I/O PnP/Keyboard
M5135F Super I/O PnP/Keyboard/IR
M514? Super I/O PnP/Keyboard/IR/2xCOM/
M5213 PCI IDE
M5217/H Super I/O
M5219 PCI? Bus mastering EIDE
M5225 PCI? EIDE
M5229 PCI? Bus mastering EIDE
M5235 Super I/O
M5237 PCI USB Host
M5240 PCI? EIDE
M5241 PCMCIA Bridge
M5242 ?
M5244 FDD
M5427 PCI-AGP Bridge
M5451 Audio
M5453 Modem
M5455 Audio
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82485 Turbo Cache (and 485Turbocache) c90
***Notes:...
***Info:
The 82485 is a second-level cache controller designed to improve the
performance of Intel486 Microprocessor systems. One 82485 cache
controller supports 64K or 128K bytes of second level cache memory
that maps to the entire 4 Gigabytes of the Intel486 microprocessor
address space. The controller is completely software transparent. One
controller plus SRAMs provides a 64K or a 128K cache. External EPROM
can be cached yet remain write protected. The 82485 is fully
compatible with the Intel486 microprocessor. All Intel486 CPU bus
cycles and timings are supported.
A complete, optional second level cache controller using the 82485 is
available as the 485Turbocache Module from Intel (data sheet order
number 240722).
2.0 FUNCTIONAL DESCRIPTION
2.1 Introduction
The 82485 is a single ported, two-way set associative cache controller
designed specifically to interface with the Intel486 microprocessor.
The controller supports either a sectored configuration (two lines per
tag) or a non-sectored configuration (one line per tag). The 82485
will directly support a nonsectored 64K data cache or a 128K sectored
data cache. Both the 64K and 128K configurations are able to map the
entire 4 gigabytes of the Intel486 microprocessor address space. The
82485 interfaces directly to the Intel486 microprocessor. All Intel-
486 CPU bus cycles and timings are supported. The 82485 also supports
0 wait state processor operation when there is a cache hit and has
provisions to support invalidation cycles, BOFF# cycles, and premature
BLAST# terminations. The controller is look aside (monitors bus act-
ivity in parallel to the processor) and write through (all writes pro-
pagate to the system bus), so it supports the same cache consistency
mechanisms as the Intel486 CPU. The controller also provides a safe
method to cache ROM BIOS through the use of a write protect pin and a
write protect strapping option.
The data cache (Static RAM) resides external to the 82485. The 82485
provides all controls for the SRAMs. No external latches or tran-
ceivers are required. The 82485 output buffers support up to eight
SRAMs. A 64K cache can be designed with only five components; nine
components for a 128K cache. Two-way set associativity is provided by
dual banked SRAMs. Data parity is supported.
The 82485 can be used to design a custom second level cache
configuration. For an easier system design and higher integration, the
82485M Turbocache can be used (see data sheet order number 240722).
This module is a complete second level cache in one package. It
consists of a single 82485 cache controller and SRAM to provide a
complete 64K or 128K second level Intel486 microprocessor second level
cache.
***Versions:...
***Features:...
**82489DX Advanced Programmable Interrupt Controller 10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
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