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**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
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*SIS...
**530/5595       (Sinbad) Host, PCI, 3D Graphics & Mem. Ctrl.<11/10/98
***Info:...
***Configurations:...
***Features:
o   Supports Intel/AMD/Cyrix/IDT Pentium CPU Host Bus at 
    66/75/83/95/100 MHz and 2.5/3.3V Bus Interface
    − Supports the Pipelined Address of Pentium compatible CPU
    − Supports the Linear Address Mode of Cyrix CPU
    − 100/100, 95/95, 83/83, 75/75 and 66/66 MHz Synchronous 
      Host/DRAM clocking configuration
    − 100/75, 95/75, 83/66, 66/100 and 66/83 MHz Asynchronous 
      Host/DRAM clocking configuration
    − Supports Host Bus operation for integrated 3D VGA Controller
o   Meets PC99 Requirements
o   Supports PCI Revision 2.2 Specification
o   Integrated Super AGP VGA for Hardware 2D/3D Video/Graphics 
    Accelerators
    − Supports tightly coupled 64 bits 100MHz host interface to VGA 
      to speed up GUI performance and the video playback frame rate
    − Built-in programmable 24-bit true-color RAMDAC up to 230 MHz 
      pixel clock
    − Built-in reference voltage generator and monitor sense circuit
    − Supports loadable RAMDAC for gamma correction in high color 
      and true color modes
    − Built-in dual-clock generator
    − Supports Multiple Adapters and Multiple Monitors
    − Built-in PCI multimedia interface
    − Flexible design for shared frame buffer or local frame buffer 
      architecture
    − Shared System Memory Area 2MB, 4MB and 8MB
    − Supports SDRAM and SGRAM local frame buffer and memory size up 
      to 8 MB
    − Supports Digital Flat Panel Port for Digital Monitor (LCD Panel)
    − Supports DVD H/W Accelerator
o   Integrated Second Level ( L2 ) Cache Controller
    − Write Back Cache Mode
    − Direct Mapped Cache Organization
    − Supports Pipelined Burst SRAM
    − Supports 256K/512K/1M/2M Bytes Cache Sizes
    − Cache Hit Read/Write Cycle of 3-1-1-1
    − Cache Back-to-Back Read Cycle of 3-1-1-1-1-1-1-1
    − Supports Single Read Allocation for L2 Cache
    − Supports Concurrency of CPU to L2 cache and Integrated A.G.P. 
      VGA master to DRAM accesses
o   Integrated DRAM Controller
    − Supports up to 3 double sided DIMMs (6 rows memory)
    − Supports 8Mbytes to 1.5 GBytes of main memory
    − Supports Cacheable DRAM Sizes up to 256 MBytes
    − Supports 1M/2M/4M/8M/16M/32M x N for 2-bank or 4-bank SDRAM
    − Supports 3.3V DRAM
    − Supports Concurrent Write Back
    − Supports CAS before RAS Refresh, Self Refresh
    − Supports Relocation of System Management Memory
    − Programmable CS#, DQM#, SRAS#, SCAS#, RAMWE# and MA Driving 
      Current
    − Option to Disable Local Memory in Non-cacheable Regions
    − Entries GART cache to Minimize the Number of Memory Bus Cycles 
      Required for Accessing Graphical Texture Memory
    − Programmable Counters to Ensure Guaranteed Minimum Access Time 
      for Integrated A.G.P. VGA, CPU, and PCI accesses
    − Two Programmable Non-cacheable Regions
    − Supports X-1-1-1/X-2-2-2 Burst Write Cycles
    − Fully Configurable for the Characteristic of Shadow RAM (640 
      KBytes to 1 MBytes)
    − Shadow RAM in Increments of 16 KBytes Built-in 8 Way 
      Associative/16
    − Supports SDRAM 7/8-1-1-1 Burst Read Cycles
o   Provides High Performance PCI Arbiter
    − Supports up to 4 PCI Masters
    − Supports Rotating Priority Mechanism
    - Hidden Arbitration Scheme Minimizes Arbitration Overhead
    - Supports Concurrency between CPU to Memory and PCI to PCI
    - Supports Concurrency between CPU to 33Mhz PCI Access and 33Mhz 
      PCI to integrated A.G.P. VGA Access
    - Programmable Timers Ensure Guaranteed Minimum Access Time for 
      PCI Bus Masters, and CPU
o   PCI Bus Interface
    - Supports 32-bit PCI local bus standard Revision 2.2 compliant
    - Integrated write-once subsystem vendor ID configuration register
    - Supports zero wait-state memory mapped I/O burst write
    - Integrated 2 stages PCI post-write buffer to enhance frame 
      buffer write performance
    - Integrated 256 bits read cache to enhance frame buffer read 
      performance
    - Supports full 16-bit re-locatable VGA I/O address decoding
o   Integrated Host-to-PCI Bridge
    - Supports Asynchronous PCI Clock
    - Translates the CPU Cycles into the PCI Bus Cycles
    - Zero Wait State Burst Cycles
    - Supports Pipelined Process in CPU-to-PCI Access
    - Maximum PCI Burst Transfer from 256 Bytes to 4 Kbytes
    - Supports Memory Remapping Function for PCI master accessing 
      Graphical Window
o   Integrated A.G.P. Compliant Target/66Mhz Host-to-PCI Bridge
    - Supports Graphic Window Size from 4MBytes to 256MBytes
    - Supports Pipelined Process in CPU-to-Integrated 3D A.G.P. 
      VGA Access
    - Supports 8 Way, 16 Entries Page Table Cache for GART to enhance 
      Integrated A.G.P. VGA Controller Read/Write Performance
    - Supports PCI-to-PCI bridge function for memory write from 33Mhz 
      PCI bus to Integrated A.G.P. VGA
o   Integrated Posted Write Buffers and Read Prefetch Buffers to 
    Increase System Performance
    - CPU-to-Memory Posted Write Buffer (CTMFF) with 12QW Deep, Always 
      Sustains 0 Wait Performance on CPU-to-Memory
    - CPU-to-Memory Read Buffer with 4 QW Deep
    - CPU-to-PCI Posted Write Buffer with 2 QW Deep
    - PCI-to-Memory Posted Write Buffer with 8 QW Deep, Always 
      Streams 0 Wait Performance on PCI-to/from-Memory Access
    - PCI-to-Memory Read Prefetch Buffer with 8 QW Deep
    - CPU-to-VGA Posted Write Buffer with 4 QW Deep
o   Fast PCI IDE Master/Slave Controller
    - Bus Master Programming Interface for Windows 98 Compliant 
      Controller
    - Plug and Play Compatible
    - Supports Scatter and Gather
    - Supports Dual Mode Operation - Native Mode and Compatibility 
      Mode
    - Supports IDE PIO Timing Mode 0, 1, 2 ,3 and 4
    - Supports Multiword DMA Mode 0, 1, 2
    - Supports Ultra DMA 33/66
    - Two Separate IDE Bus
    - Two 16 DW FIFO for PCI Burst Transfers.
o   Supports NAND Tree for Ball Connectivity Testing
o   576-Balls BGA Package
o   3.3V Core with mixed 2.5V, 3.3V and 5V I/O CMOS Technology

**540            (Spartan) Super7 2D/3D Ultra-AGP Single C.S.<11/30/99...
**55x            SoC (System-on-chip)                        <03/14/02...
**
**Support chips:
**85C206     Integrated Peripheral Controller [no datasheet]         ?...
**5595       Pentium PCI System I/O                          <12/24/97...
**950        LPC I/O                                         <07/16/99...
**Other:...
**PII/III/Pro...
**Athlon etc...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
**FE2010/A      XT CPU controller integrated Circuit         >11/22/85
***Notes:...
***Info:...
***Versions:...
***Features:...
**FE2011        CPU Core Logic for PS/2 Model 30 Compatible       c:87
***Info:...
***Versions:...
***Features:...
**FE3400/B      80286-Based AT Compatible CPU Core Logic (12 MHz) c:86...
**FE3500/B      80286-Based AT Compatible CPU Core Logic (12 MHz) c:87...
**FE3600/A/B/C  16/20MHz AT Chip set                              c:88...
**FE5300        CPU Core Logic for PS/2 Model 50/60 Compatibles   c:87...
**FE5400        CPU Core Logic for PS/2 Model 50/60 Compatibles   c:87...
**FE6500        CPU Core Logic for PS/2 Model 70/80 Compatibles   c:88...
**WD6400SX/LP   CPU Core Logic for PS/2 386SX Compatibles          <90...
**WD6500        CPU Core Logic for PS/2 386DX/486 Compatible       <90...
**WD7600A/LP/LV System Chip Set for 80286 or 80386SX         <11/25/91...
**WD7700/LP     System Chip Set for 80286 or 80386SX (Cache) <11/25/91...
**WD7855        System controller for 80386SX                <09/25/92...
**WD7900/LP/LV  System Chip Set for 80286 or 80386SX (Cache) <11/25/91...
**WD8110        System controller for 80386DX/486            <11/30/93...
**
**Support Chips:
**WD76C20x   Floppy, RTC, IDE and Support Logic Device       <11/25/91...
**WD76C30x   Perip. Ctrl, Interrupt Multiplex, and Clock Gen <11/18/91...
**WD7615     Desktop Buffer Manager                          <04/15/92...
**WD7625     Desktop Buffer Manager                          <10/01/92...
**WD8120LV   Super I/O [no datasheet]                                ?
**Other Chips:
SYSTEMS LOGIC/PERIPHERAL DEVICES
WD16C451, WD16C551 - Enhanced Asynchronous Communications Element (ACE) with Parallel Port
WD16C452, WD16C552 - Dual Enhanced Asynchronous Communications Element (ACE)
WD16C550             Enhanced Asynchronous Communications Element (ACE) with FIFOs
WD76C10AlLP/LV       ISA-Based System Controller for 80386SX and 80286 Desktop and Portable Compatibles
WD76C20/LV   Floppy Disk Controller, Real Time Clock, IDE Interface, and Support Logic Device 
WD76C30/LV   Peripheral Controller, Interrupt Multiplexer, and Clock Generator Device
WD7710/LP    ISA-Based System Controller with Cache for 80386SX and 80286 Desktop and Portable Compatibles
WD7910/LP    ISA-Based System Controller with Cache for 80386SX and 80286 Desktop and Portable Compatibles

IMAGING DEVICES
ICS90C61A          Dual Video/Memory Clock Generator     
ICS90C63   	   Dual Video/Memory Clock Generator 
ICS90C64   	   Dual Video/Memory Clock Generator 
WD90C00	   	   VGA Controller (8514/A clone, max 1MB, 1024x768x16, 800x600x256)                     
WD90C01 	   8514/A for laptops
WD90C10 	   VGA, 256KB
WD90C11, WD90C11A  Enhanced VGA Controller (max 512KB, 1024x768x16, 800x600x256)
WD90C20, WD90C20A  VGA Flat Panel Display Controller (800x600x16, 640x460x256, 32 shades gray)
WD90C22            VGA Flat Panel Display Controller (800x600x16, 640x460x256, 64 shades gray)
WD90C24/A/A2       SVGA, max 1MB, 1280x1024x16, 1024x768x16, LCD, VESA-LB, 3.3 or 5V
WD90C26            VGA Flat Panel Display Controller
WD90C30 	   High Performance Video Controller (max 1MB, 1024x768x256, 1024x768x16)
WD90C31 	   Accelerator Video Controller (max 1MB, 1024x768x256, 1280x1024x16)
WD90C33            Same as WD90C31 but with, max 2MB, VESA-LB, 1280x1024x256, 1280x1024x16)
WD90C55            VGA LCD Interface
WD90C56            VLBI (Video Local Bus Interface), for WD90C30/31, VESA not mentioned. 
WD9710 		   Pipelined, 32bit core, 64bit RAM, 24bit RAMDAC, PCI/VLB
WD9712 		   similar to WD9710



STORAGE DEVICES
WD10C01A            Winchester Disk Controller
WD10C27	    	    Data Separator
WD33C92A    	    Enhanced SCSI Bus Interface Controller
WD33C93B            Enhanced SCSI Bus Interface Controller
WD33C95A, WD33C96A  Enhanced Single-ended and Differential SCSI Bus Interface Controller
WD37C65C  	    Floppy Disk Subsystem Controller Device 
WD42C22C 	    Winchester Disk Subsystem Controller Device
WD60C318 	    Optical Disk Drive Encoder/Decoder 
WD60C40A  	    Peripheral Cache Manager Device
WD60C80 	    Error Detection and Correction Chip (EDAC)
WD61C23A 	    High Performance Hard Disk Controller
WD61C40A 	    Peripheral Cache Manager Device
WD7000 		    ESDI Controller (16-bit ISA)
WD7193 		    Fast SCSI-II PCI adapter, 33C296A-ZX chip
WD7197 		    Fast Wide version of WD7193
WD7296A 	    Fast Wide SCSI-II (PCI?), possibly WD34C296 chip




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