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**800 series
***810         (Whitney)       04/26/99...
***810L        (Whitney)       04/26/99...
***810-DC100   (Whitney)       04/26/99...
***810e        (Whitney)       09/27/99...
***810e2       (Whitney)       01/03/01...
***815         (Solano)        06/19/00...
***815e        (Solano-2)      06/19/00...
***815em       (Solano-?)      10/23/00...
***815ep       (Solano-3)      c:Nov'00...
***815p        (Solano-3)      c:Mar'01...
***815g        (Solano-3)      c:Sep'01...
***815eg       (Solano-3)      c:Sep'01...
***820         (Camino)        11/15/99
Chips:
[82820] (MCH) [82801AA] (ICH) [82802] (FWH) [82805AA] (MTH)
CPUs:          Single or Dual P-II/P-III/Celeron
DRAM Types:    SDRAM/Reg SDRAM/RDRAM PC800/Asynch SDRAM*1
Mem Rows:      ?
DRAM Density:  64Mbit 128Mbit 256Mbit
Max Mem:       512MB SDRAM/1GB Reg SDRAM/1GB RDRAM
ECC/Parity:    ECC
AGP speed:     1x 2x 4x
Bus Speed:     100 133
PCI Clock/Bus: 1/3 1/4 PCI 2.2

>*1 RAM operates at 100 MHz regardless of FSB.

***820e        (Camino-2)      06/05/00...
***830M        (Almador)       07/30/01...
***830MP       (Almador)       07/30/01...
***830MG       (Almador)       07/30/01...
***840         (Carmel)        10/25/99...
***845         (Brookdale)     09/10/01...
***845MP       (Brookdale-M)   03/04/02...
***845MZ       (Brookdale-M)   03/04/02...
***845E        (Brookdale-E)   05/20/02...
***845G        (Brookdale-G)   05/20/02...
***845GL       (Brookdale-GL)  05/20/02...
***845GE       (Brookdale-GE)  10/07/02...
***845PE       (Brookdale-PE)  10/07/02...
***845GV       (Brookdale-GV)  10/07/02...
***848P        (Breeds Hill)   c:Aug'03...
***850         (Tehama)        11/20/00...
***850E        (Tehama-E)      05/06/02...
***852GM       (Montara-GM)    01/14/03...
***852GMV      (Montara-GM)    ???...
***852PM       (Montara-GM)    06/11/03...
***852GME      (Montara-GM)    06/11/03...
***854         (?)             04/11/05...
***855GM       (Montara-GM)    03/12/03...
***855GME      (Montara-GM)    03/12/03...
***855PM       (Odem)          03/12/03...
***860         (Colusa)        05/21/01...
***865G        (Springdale)    05/21/03...
***865PE       (Springdale-PE) 05/21/03...
***865P        (Springdale-P)  05/21/03...
***865GV       (Springdale-GV) c:Sep'03...
***875P        (Canterwood)    04/14/03...
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**SL82C465    Cache Controller (for 486/386DX/SX)                 c:91
***Info:
The SL82C465 cache controller supports both 1X and 2X clock modes. The
1X clock  mode means that the CCLK2  signal is used as  the CPU clock;
the 2X clock  mode means that the PCLK signal  (half the frequency and
the phase indicator  of CCLK2) is used as the  CPU clock. The SL82C465
and other CPU local bus devices run at the same clock frequency as the
CPU, while  the rest of the system  runs at the frequency  of PCLK. In
other words, the operating frequency of the system logic is either the
same (2X clock mode) or half the speed of the CPU (1X clock mode). For
the 1X clock mode, the timing of the signals between the CPU/Cache and
the system logic interface  is converted by the SL82C465 automatically
to  satisfy  the requirement  of  individual  clocks.  Table 1-1  [see
datasheet] lists  the operating frequencies  of the CPU local  bus and
the system logic with the oscillator used.

The 2X  clock mode is recommended  for a CPU frequency  no faster than
33Mhz because the system logic  is available at the targeted speed and
the  performance  is  slightly  better  than if  1X  clock  mode  were
used. For  a CPU  frequency faster  than 33Mhz, the  1X clock  mode is
preferred  for  486  systems  because  it  becomes  increasingly  more
difficult to  build a reliable  system with an oscillator  faster than
66Mhz.

***Versions:...
***Features:...
*TI (Texas Instruments)...
*UMC...
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*VIA...
*VLSI...
*Western Digital...
**FE2011        CPU Core Logic for PS/2 Model 30 Compatible       c:87
***Info:...
***Versions:...
***Features:...
**FE3400/B      80286-Based AT Compatible CPU Core Logic (12 MHz) c:86...
**FE3500/B      80286-Based AT Compatible CPU Core Logic (12 MHz) c:87...
**FE3600/A/B/C  16/20MHz AT Chip set                              c:88...
**FE5300        CPU Core Logic for PS/2 Model 50/60 Compatibles   c:87...
**FE5400        CPU Core Logic for PS/2 Model 50/60 Compatibles   c:87...
**FE6500        CPU Core Logic for PS/2 Model 70/80 Compatibles   c:88...
**WD6400SX/LP   CPU Core Logic for PS/2 386SX Compatibles          <90...
**WD6500        CPU Core Logic for PS/2 386DX/486 Compatible       <90...
**WD7600A/LP/LV System Chip Set for 80286 or 80386SX         <11/25/91...
**WD7700/LP     System Chip Set for 80286 or 80386SX (Cache) <11/25/91...
**WD7855        System controller for 80386SX                <09/25/92...
**WD7900/LP/LV  System Chip Set for 80286 or 80386SX (Cache) <11/25/91...
**WD8110        System controller for 80386DX/486            <11/30/93...
**
**Support Chips:
**WD76C20x   Floppy, RTC, IDE and Support Logic Device       <11/25/91...
**WD76C30x   Perip. Ctrl, Interrupt Multiplex, and Clock Gen <11/18/91...
**WD7615     Desktop Buffer Manager                          <04/15/92...
**WD7625     Desktop Buffer Manager                          <10/01/92...
**WD8120LV   Super I/O [no datasheet]                                ?
**Other Chips:...
*Winbond...
*ZyMOS...
*General Sources:...

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