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**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93
***Notes:...
***Info:
The 82496 Cache Controller and multiple 82491 Cache SRAMs combine with
the Pentium processor  to form a CPU Cache chip  set designed for high
performance  servers  and   function-rich  desktops.  The  high  speed
interconnect between  the CPU and cache components  has been optimized
to  provide zero-wait  state operation.   This CPU  Cache chip  set is
fully compatible  with existing software,  and has new  data integrity
features for mission critical applications.

The 82496 cache controller implements the MESI write-back protocol for
full multiprocessing support. Dual  ported buffers and registers allow
the 82496  to concurrently  handle CPU bus,  memory bus,  and internal
cache operation for maximum performance.

The 82491. is a customized high-performance SRAM that supports 32, 64,
and 128-bit  wide memory bus widths,  16, 32, and 64  byte line sizes,
and optional sectoring.  The data path between the  CPU bus and memory
bus  is separated  by the  82491, allowing  the CPU  bus  to handshake
synchronously,  asynchronously,  or   with  a  strobed  protocol,  and
allowing concurrent CPU bus and memory bus operations.

***Configurations:...
***Features:...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
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**VL82C106 Combination I/O chip                                      ?
***Info:...
***Versions:...
***Features:
o   Combines the following PC/AT peripheral chips:
    VL16C450B UART        - COM 1:
    VL16C450B UART        - COM 2:
    Parallel printer port - LPT 1:
    Keyboard/mouse ctrl.  - KBD
    Real-time clock       - RTC
o   Serial ports 100% 16C450B-compatible
o   Bidirectional Line Printer Port (LPT)
o   CMOS direct drive of Centronics type parallel interface
o   PC/AT- or PS/2-compatible keyboard and mouse controller
o   146818A-compatible real-time clock (RTC)
o   16 bytes of additional standby RAM (66 bytes total)
o   IDE bus control signals included (two external 74LS245 and one 
    74LS244, or equivalent, buffers are required)
o   Seven battery-backed programmable chip select registers for auto-
    configuration
o   Preprogrammed default chip select registers
o   Programmable wait state generation
o   5 uA standby current for RTC, RAM and chip select registers
o   Single 128-lead plastic quad flatpack


**VL82C107 SCAMP  Combination I/O chip                               ?...
**VL82C108 TOPCAT Combination I/O chip                               ?...
**VL82C110 Combination I/O chip                                      ?...
**VL82C113 SCAMP  Combination I/O chip                               ?...
**VL82C114 Combination I/O chip                                      ?...
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**Not sure if they actually exist...
*Western Digital...
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*ZyMOS...
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