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*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91
***Notes:...
***Info:...
***Features:...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
**5596/5513 (Genesis) Pentium PCI Chipset <03/26/96
***Info:...
***Configurations:...
***Features:
o Supports Intel Pentium CPU and other compatible CPU at
66/60/50MHz (external clock speed)
o Supports VGA Shared Memory Architecture
- Direct Memory Accesses
- Shared Memory Area 0.5M, 1M, 1.5M, 2M, 2.5M, 3M, 3.5M, 4M.
- Built-in 2-Priority Scheme.
o Supports the Pipelined Address Mode of Pentium CPU.
o Integrated Second Level (L2) Cache Controller
- Write Through and Write Back Cache Modes
- 8 bits or 7 bits Tag with Direct Mapped Cache Organization
- Supports Pipelined Burst SRAM.
- Supports 256 KBytes to 1 MBytes Cache Sizes.
- Cache Read/Write Cycle of 3-1-1-1 Pipelined Burst SRAM at 66
Mhz and 3-1-1-1-1-1-1-1 at back to back read cycle.
o Integrated DRAM Controller
- Supports 4 RAS lines, the memory size is from 4MBytes up to
512Mbytes.
- Supports 256K/512K/1M/2M/4M/16M x N 70ns FP/EDO DRAM
- Supports 4K Refresh DRAM
- Supports 3V or 5V DRAM.
- Supports Symmetrical and Asymmetrical DRAM.
- Supports 32 bits/64 bits mixed mode configuration
- Supports Concurrent Write Back
- Table-free DRAM Configuration, Auto-detect DRAM size, Bank
Density, Single/Double sided DRAM, EDO/ FP DRAM for each bank
- Supports CAS before RAS "Intelligent Refresh"
- Supports Relocation of System Management Memory
- Programmable CAS# Driving Current
- Fully Configurable for the Characteristic of Shadow RAM (640
KByte to 1 Mbyte)
o Supports EDO/FP 5/6-2-2-2/-3-3-3 Burst Read Cycles
o Two Programmable Non-Cacheable Regions
o Option to Disable Local Memory in Non-Cacheable Regions
o Shadow RAM in Increments of 16 KBytes
o Supports SMM Mode of CPU.
o Supports CPU Stop Clock.
o Supports Break Switch.
o Provides High Performance PCI Arbiter.
- Supports 4 PCI Master.
- Supports Rotating Priority Mechanism.
- Hidden Arbitration Scheme Minimizes Arbitration Overhead.
- Supports Concurrency between CPU to Memory and PCI to PCI.
o Integrated PCI Bridge
- Supports Asynchronous PCI Clock.
- Translates the CPU Cycles into the PCI Bus Cycles
- Provides CPU-to-PCI Read Assembly and Write Disassembly
Mechanism
- Translates Sequential CPU-to-PCI Memory Write Cycles into PCI
Burst Cycles.
- Zero Wait State Burst Cycles.
- Supports Advance Snooping for PCI Master Bursting.
- Maximum PCI Burst Transfer from 256 Bytes to 4 KBytes.
o 388-Pin BGA Package.
o 0.5μm CMOS Technology.
**5597/5598 (Jedi) Pentium PCI/ISA Chipset <04/15/97...
**530/5595 (Sinbad) Host, PCI, 3D Graphics & Mem. Ctrl.<11/10/98...
**540 (Spartan) Super7 2D/3D Ultra-AGP Single C.S.<11/30/99...
**55x SoC (System-on-chip) <03/14/02...
**
**Support chips:
**85C206 Integrated Peripheral Controller [no datasheet] ?...
**5595 Pentium PCI System I/O <12/24/97...
**950 LPC I/O <07/16/99...
**Other:...
**PII/III/Pro...
**Athlon etc...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
**VL82C521/522 Lynx/M ?
***Info:...
***Configurations:...
***Features:
o Support for Pentium and Pentium-class CPUs
o 64-bit wide SDRAM, EDO, and FPM DRAM controller
o Nine-deep, 64-bit fast-access smart write buffers
o Fully PCI 2.1 compliant, 33MHz, synchronous or asynchronous, high
performance (120 MB/s) PCI bus with full concurrency to support
high bandwidth multi-media
o Flexible L2 write-back cache controller supporting 3-1-1-1-1-1-1-1
burst cycles
o Highly integrated chipset in low-profile BGA packages
o Active thermal feedback (ATF) for closed-loop thermal control of
the CPU
o PCI bridge support for high-performance primary PCI hot docking
o Common Architecture Serial Bus minimizes docking connector pin
count
o SMB/I2C system management bus improves battery monitoring
o Singular ROM for keyboard, System and graphics BIOS
o Full 2 channel Bus Mastering IDE controller
o Integrated '077 FDC
o Two 16550 UARTs
o 8052 keyboard controller with built-in scan for matrix keyboards and
boot controller functionality
o system clocks from power-managed PLLs with on-board buffering for
distribution
o Two PWMs to provide LCD backlight and contrast control
o Parallel port with PS2, EPP and ECP extensions
o Built-in IrDA 1.1 Fast Infrared communications port
o Multiple VCC rails and on-board level shifters to provide inder-
pendent power-down and true 5.0 Vdc peripheral support
o Support for three PS2 ports
o Real-Time Clock with CMOS
o 25 GPIO pins with expansion
o Built-in Sub-ISA bus for 16-bit DMA ISA Master audio device
o Supports 3.3V and 0V suspend with multiple resume events, I/O
trapping, and audio 0V suspend/resume
o Bus Keeper I/Os to reduce battery drain in suspend mode
o Supports shut-down option for CPU core power during powered
suspend to maximize battery life
o Supports CPU clock division emulation to effectively reduce CPU
clock frequency
o Plug-N-Play support
o Compliant with Microsoft recommendations for Win '95
**VL82C530 Eagle Ð c95...
**VL82C541/543 Lynx c95...
**VL82C591/593 SuperCore 590 c94...
**VL82C594/596/597 Wildcat c95...
**I/O Chips:
**VL82C106 Combination I/O chip ?...
**VL82C107 SCAMP Combination I/O chip ?...
**VL82C108 TOPCAT Combination I/O chip ?...
**VL82C110 Combination I/O chip ?...
**VL82C113 SCAMP Combination I/O chip ?...
**VL82C114 Combination I/O chip ?...
**Video: ...
**Disk:...
**Modems:...
**Other:...
**Not sure if they actually exist...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...
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