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**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91
***Notes:...
***Info:...
***Features:...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
**82C291         SXWB PC/AT Chipset  (386SX)                      c:91
***Info:
The  OPTi  SXWB  provides  a  highly  integrated  solution  for  fully
compatible, high-performance PC/AT platforms.  Since the chipset is so
critical to  the performance and cost  structure of a  PC, this highly
integrated approach provides the  foundation for a very cost effective
platform  without  compromising  performance.   Together  with  OPTi’s
82C206  Integrated  Peripherals Controller  (IPC),  this silicon  will
support the Intel/AMD 386SX  and Cyrix CX486SLC microprocessors in the
most cost effective and power efficient designs available today.  This
chipset offers  optimum next generation performance  for 386SX systems
running up to  33MHz. The OPTi SXWB solution  provides the performance
benefits of  a 32-bit programming  architecture with the  cost savings
associated  with  16-bit  hardware  systems.  The  OPTi  SXWB  chipset
provides a  solution positioned  to deliver value,  without neglecting
quality, compatibility, or reliability.

The  82C291 integrates  a write-back  cache controller,  a  local DRAM
controller, the CPU state machine,  the AT bus state machine, and data
buffers all in a single 160-pin Plastic Quad Flat Pack (PQFP). On-chip
hardware provides the hooks for local bus device support.


***Configurations:...
***Features:...
**82C295         SLCWB PC/AT Chipset (386SX)                         ?...
**82C381/382     HiD/386             (386DX)                      c:89...
**82C391/392     386WB PC/AT Chipset (386DX)                    <Dec90...
**82C461/462     Notebook PC/AT chipset [no datasheet]               ?...
**82c463         SCNB Single Ship Notebook                        c:92...
**82c465MV/A/B   Single-Chip Mixed Voltage Notebook Solution    <Oct97...
**82C481?/482?   HiP/486 & HiB/486 [no datasheet]                Oct89...
**82C491/392     486WB PC/AT Chipset                         <04/21/91...
**82C493/392     486SXWB                                     <10/21/91...
**82C495SX/392SX LCWB PC/AT chipset [no datasheet]                   ?...
**82C495SLC      DXSLC 386/486 Low Cost Write Back                c:92...
**82C495XLC      PC/AT Chip Set                                   c:93...
**82c496A/B      DXBB PC/AT Chipset                             <Mar92...
**82C496/7       DXBB PC/AT Chipset (Cached)                 <01/16/92...
**82C498         DXWB PC/AT chipset [no datasheet]                   ?...
**82C499         DXSC DX System Controller                        c:93...
**82C546/547     Python PTM3V                                     c:94...
**82C556/7/8     Viper [no datasheet]                                ?...
**82C556/7/8N    Viper-N  Viper Notebook Chipset             <05/25/95...
**82C556M/7M/8E  Viper-N+ Viper Notebook Chipset                  c:96...
**82C566/7/8     Viper-Max Chipset Scalable MultiMedia PC Solution   ?...
**82C571/572     486/Pentium                                      c:93...
**82C576/7/8     Viper Xpress  [no datasheet]                        ?...
**82C576/8/9     Viper XPress+ [no datasheet, some info]     <01/16/97...
**82C596/597     PTMAWB Pentium Adaptive Write-back (Cobra)       c:93...
**82C650/1/2     Discovery (Pentium Pro) [no datasheet]              ?...
**82C681/2/6/7   386/486WB EISA                                   c:92...
**82C683         386/486AWB EISA [no datasheet]                      ?...
**82C693/6/7     Pentium uP Write Back Cache EISA                 c:93...
**82C700         FireStar                                         c:97...
**82C701         FireStar Plus                                    c:97...
**82C750         Vendetta      [no datasheet]                        ?...
**82c801         SCWB2 DX Single Chip Solution                    c:92...
**82C802         SCWB2 PC/AT Single Chip [no datasheet]              ?...
**82C802G/GP     System/Power Management Controller (cached)      c:93...
**82C895         System/Power Management Controller (cached)   c:Sep94...
**82C898         System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2       Buffer Devices                                 <Nov94...
**82C822         PCIB (VLB-to-PCI bridge)                         c:94...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
**UM82C480     386/486 PC Chip Set                                 c91
***Info:...
***Configurations:...
***Features:
o   100% IBM PC/AT compatible
o   Supports 80386 CPU running at 25/33/40 MHz
o   Supports 80486 CPU running at 25/33/40/50 MHz in 1x clock
o   Supports Intel 80387 / Weitek 3167 / Weitek 4167 Floating Point 
    Coprocessors
o   Built-in cache controller:
    - Direct-mapped organization with write-back operation
    - 0 wait state for cache hit
    - Flexible cache size: 32/64/128/256/512/1024 KB
    - Hidden DRAM refresh to boost system performance
    - built-in registers to support three independent non-cacheable 
      regions
    - Support cache line fill as well as 80486 burst mode
    - Support Automatic Memory Size Detection
o   Sophisticated DRAM controller:
    - Supports Fast/Standard page mode
    - Supports 4 banks CPU speed DRAM with memory size up to 64MB
    - Supports mixable 256Kx9, 1Mx9, 4Mx9 DRAM modules
    - Programmable DRAM wait states
    - Supports 256KB or 384KB (A to F segments of first 1MB) 
      relocation to the top of DRAM memory
o   Supports sophisticated Shadow RAM for video and system BIOS (C, D,
    E, F segments)
o   Supports first GATE A20 and fasy CPU RESET to optimize OS/2 
    operations
o   Synchronous AT bus clock with programmable clock (divided by 2, 3,
    4, 5, 6)
o   Programmable CPU clock (divided by 1, 2, 3, 4)
o   Support 256KB/512KB/1MB EPROMs with single or double EPROM BIOS 
    configuration

**UM82C493/491 ??????????????? [no datasheet]                        ?...
**UM8498/8496  486 VL Chipset  "Super Energy Star Green"[no dsheet]c94...
**UM8881/8886  HB4 PCI Chipset "Super Energy Star Green"[no dsheet]c94...
**UM8890       Pentium chipset [no datasheet]                        ?...
**
**Support Chips:
**UM82152      Cache Controller (AUStek A38152 clone)              <91...
**UM82C852     Multi I/O For XT                                    <91...
**UM82C206     Integrated Peripheral Controller                    <91...
**UM82c45x     Serial/Parallel chips                                 ?...
**Other chips:...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...

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