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**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91
***Notes:...
***Info:...
***Features:...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
**82C291 SXWB PC/AT Chipset (386SX) c:91
***Info:
The OPTi SXWB provides a highly integrated solution for fully
compatible, high-performance PC/AT platforms. Since the chipset is so
critical to the performance and cost structure of a PC, this highly
integrated approach provides the foundation for a very cost effective
platform without compromising performance. Together with OPTi’s
82C206 Integrated Peripherals Controller (IPC), this silicon will
support the Intel/AMD 386SX and Cyrix CX486SLC microprocessors in the
most cost effective and power efficient designs available today. This
chipset offers optimum next generation performance for 386SX systems
running up to 33MHz. The OPTi SXWB solution provides the performance
benefits of a 32-bit programming architecture with the cost savings
associated with 16-bit hardware systems. The OPTi SXWB chipset
provides a solution positioned to deliver value, without neglecting
quality, compatibility, or reliability.
The 82C291 integrates a write-back cache controller, a local DRAM
controller, the CPU state machine, the AT bus state machine, and data
buffers all in a single 160-pin Plastic Quad Flat Pack (PQFP). On-chip
hardware provides the hooks for local bus device support.
***Configurations:...
***Features:...
**82C295 SLCWB PC/AT Chipset (386SX) ?...
**82C381/382 HiD/386 (386DX) c:89...
**82C391/392 386WB PC/AT Chipset (386DX) <Dec90...
**82C461/462 Notebook PC/AT chipset [no datasheet] ?...
**82c463 SCNB Single Ship Notebook c:92...
**82c465MV/A/B Single-Chip Mixed Voltage Notebook Solution <Oct97...
**82C481?/482? HiP/486 & HiB/486 [no datasheet] Oct89...
**82C491/392 486WB PC/AT Chipset <04/21/91...
**82C493/392 486SXWB <10/21/91...
**82C495SX/392SX LCWB PC/AT chipset [no datasheet] ?...
**82C495SLC DXSLC 386/486 Low Cost Write Back c:92...
**82C495XLC PC/AT Chip Set c:93...
**82c496A/B DXBB PC/AT Chipset <Mar92...
**82C496/7 DXBB PC/AT Chipset (Cached) <01/16/92...
**82C498 DXWB PC/AT chipset [no datasheet] ?...
**82C499 DXSC DX System Controller c:93...
**82C546/547 Python PTM3V c:94...
**82C556/7/8 Viper [no datasheet] ?...
**82C556/7/8N Viper-N Viper Notebook Chipset <05/25/95...
**82C556M/7M/8E Viper-N+ Viper Notebook Chipset c:96...
**82C566/7/8 Viper-Max Chipset Scalable MultiMedia PC Solution ?...
**82C571/572 486/Pentium c:93...
**82C576/7/8 Viper Xpress [no datasheet] ?...
**82C576/8/9 Viper XPress+ [no datasheet, some info] <01/16/97...
**82C596/597 PTMAWB Pentium Adaptive Write-back (Cobra) c:93...
**82C650/1/2 Discovery (Pentium Pro) [no datasheet] ?...
**82C681/2/6/7 386/486WB EISA c:92...
**82C683 386/486AWB EISA [no datasheet] ?...
**82C693/6/7 Pentium uP Write Back Cache EISA c:93...
**82C700 FireStar c:97...
**82C701 FireStar Plus c:97...
**82C750 Vendetta [no datasheet] ?...
**82c801 SCWB2 DX Single Chip Solution c:92...
**82C802 SCWB2 PC/AT Single Chip [no datasheet] ?...
**82C802G/GP System/Power Management Controller (cached) c:93...
**82C895 System/Power Management Controller (cached) c:Sep94...
**82C898 System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2 Buffer Devices <Nov94...
**82C822 PCIB (VLB-to-PCI bridge) c:94...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
**TACT83000 AT 'Tiger' Chip Set (386) c89
***Info:...
***Configurations:...
***Features:
o High-Speed 1-um CMOS Technology Supports System Speeds up to
33 MHz
o Fully AT-Compatible 386 Three-Chip SX, Four-Chip DX Solutions
o Only Four Additional Logic Chips Needed
o Major Features Programmable Through Software
o TACT83442 Memory Control Unit (MCU)
- Cascadable up to Eight Devices
- Address Range of up to 32M Byte Per Device, 256M Byte Fully
Cascaded
- Supports 256K-, 1M-, and 4M-Bit DRAMs in Normal, Page, Word-
interleave, and Page Block-interleave Modes
- Programmable DRAM Timing Parameters
- Supports up to Two Memory Banks for 32-Bit Systems and Four
Banks for 16-Bit Systems
- Can Directly Drive up to 36 DRAM Devices
- Shadow RAM Available Between 0C 0000h and 0F FFFFh
- Contains Global Page Mapping RAM Allowing Remap of
- 64K-Byte Memory Blocks Above 1M Byte
- 16K-Byte Memory Blocks Below 1M Byte
o TACT83443 AT Bus Interface Unit (ATU)
- Internal Clock Switching Between Two Independent Frequencies
Controlled by Software
- Asynchronous AT Bus Interface With Write Buffer Option
- Full AT Direct-Drive Capability
- Extended Direct Memory Access Mode for 32-Bit Operation
- Fast CPU Reset and A20 GATE Modification
- Numeric Processor Interface for 387SX, 387DX, and Weitek 3167
- Integrates All Essential AT Peripherals
- Real Time Clock With 128-Byte CMOS RAM
o TACT83441 Data Path Unit (DPU)
- 8- and 16-Bit Data Bus Sizing
- Data Path Cascadable to 32 Bits
- Write Buffer Capability for AT Bus Access
- Supports Posted Write Operations From Cache Controller
- Parity Generation and Checking Logic
**TACT84500 AT Chip Set (486, EISA) [no datasheet, some info] c91...
**Other:...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...
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