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**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91
***Notes:...
***Info:...
***Features:...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
**HT22          386SX/286 Single Chip (25 MHz)                 c:Sep91
***Info:
The HT22  is an  advanced PC/AT compatible,  single-chip 80386SX/80286
system  design solution.   This highly  integrated single  chip allows
simple, low  cost system design  options while featuring  high perfor-
mance,  low  power  consumption,  and  minimum  board  space  require-
ments. Advanced  memory management  features include support  for page
mode,  2 or  4-way interleaving  in both  pipelined  and non-pipelined
modes.  The EMS  4.0 hardware implementation features dual  sets of 32
registers   with  full   context  support   for   highest  performance
optimization  of  extended local  memory  accesses.   An advanced  EMS
hardware  write-protect option  has  been added  for  maximum EMS  4.0
compatibility. The HTZ2 supports 256K, 1M  and 4MB DRAMs in 1 by 1 and
1 by 4 device configurations for up to 20MB of on-board system memory.
16MB  is  addressed  directly   by  system  resources,  the  remainder
addressed by the EMS mode.

A flexible Shadow  RAM option for System and Video BIOS  as well as 8-
16-bit BIOS options adds to overall design versatility.

A  complete PC/AT  compatible  system with  advanced  features may  be
implemented with minimal external support logic. The HT22 performs all
CPU  and peripheral support  functions in  a single  chip.  Integrated
device  functions include  DMA Controllers,  a Memory  Mapper, Timers,
Counters, Interrupt  Controllers, a Bus Controller  and all supporting
circuitry for PC  core logic requirements. The chip  also contains all
the  necessary  address buffers,  data  transceivers, memory  drivers,
parity  checking   and  supporting  circuitry  for   a  complete  high
performance computer  solution.  An  asynchronous AT Bus  clock allows
for  a constant 8MHz  Bus clock  rate for  highest bus  device compat-
ibility as  defined in IEEE  Spec P996. This  device is packaged  in a
208-pin Plastic Quad Flat Pack.

***Configurations:...
***Features:...
**HT25          3-volt Core Logic for 386SX                    c:Dec92...
**HT35          Single-Chip Peripheral Controller [partial info]     ?...
**HTK320        386DX Chip Set                                 c:Sep91...
**HTK340        "Shasta" 486 Chip Set                          c:Jun92...
**Support Chips:
**HT44          Secondary Cache                                c:Jun92...
**Other:...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
**TACT83000   AT 'Tiger' Chip Set (386)                            c89
***Info:
The Texas Instruments TACT83000 AT Chip Set is designed for cached and
noncached 386-based  PC-AT compatible systems running at  speeds up to
33 MHz.  Manufactured with high-speed  1-um CMOS EPIC  technology, the
chip set is functionally partitioned into three devices: the TACT83443
AT Bus Interface Unit (ATU),  the TACT83442 Memory Control Unit (MCU),
and the  TACT83441 Data  Path Unit  (DPU).  The ATU  is packaged  in a
208-lead  plastic quad  flatpack  (QFP),  while the  MCU  and DPU  are
packaged in 100-lead plastic QFPs

These three chips, along with four other logic chips, comprise all the
logic  necessary for  a  fully compatible  16-bit 3868X-based  system.
Since one DPU provides a 16-bit data path, a 32-bit 386DX-based system
requires an additional DPU.

With software-controlled configuration registers  on board the ATU and
MCU,  the  chip set  supports  a wide  variety  of  PC system  config-
urations.  For complete programming  details, see the TACT8300 AT Chip
Set User’s Guide, literature number SRZU001.

***Configurations:...
***Features:...
**TACT84500   AT Chip Set (486, EISA) [no datasheet, some info]    c91...
**Other:...
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*ZyMOS...
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