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**M1489/87 FinALi-486 PCI Chipset <Feb95
***Info:
ALi's M1489/M1487 PCI chipset is the most cost effective PCI solution
available. M1489/M1487 enables top-to-bottom PCI in 486 CPU systems,
offering superior price/performance for mainstream PCI-ISA systems.
M1489/M1487 highly integrates the DRAM controller, L2 cache control-
ler, Host, PCI, and ISA interface, as well as the standard ISA
functions: DMA controller, interrupt controller, timer/counter, RTC
(Real Time Clock), and keyboard controller. Additionally, M1489/M1487
incorporates the high performance Local Bus IDE allowing a system de-
signer to implement Local bus IDE with no additional cost. M1489/M1487
is a highly integrated solution requiring minimized TTL components,
enabling PCI-ISA designs at costs equal to or lower than comparable VL
Bus designs.
M1489 (Cache Memory PCI Controller: CMP) integrates the L2 cache con-
troller and the DRAM controller. The cache controller supports
write-back cache policies and cache size from 128K to 1M byte in an
interleaved or non-interleaved configuration. The DRAM controller
interfaces DRAM to the Host bus, PCI bus, and Link bus. M1489 can
support EDO 3/5V DRAM, standard DRAM, and flexible timing
select. M1489 also integrates intelligent Host to PCI, PCI to Host
buffer to achieve high performance. Also, M1489 provides the high
performance Local Bus IDE interface.
M1487 (ISA Bridge Controller: IBC) provides the bridge between the ISA
bus, PCI bus, and Host bus. IBC integrates the common I/O functions
found in today's ISA based systems: a seven channel DMA, two 82C59
interrupt controllers, 8254 timer/ counter, deep green function, and
control logic for NMI generation. IBC also has built-in 128 bytes RTC,
MC14069, KBC, and 7406. IBC also provides the decode for external
BIOS.
***Configurations:...
***Features:...
**M???? Genie, Quad Pentium [no datasheet, some info] c95...
**M1451/49 Aladdin (Pentium) [no datasheet] ?...
**M1511/12/13 Aladdin II (Pentium) [no datasheet, some info] >Apr95...
**M1521/23 Aladdin III 50-66MHz <Nov96...
**M1531/33/43 Aladdin IV & IV+ 50-83.3MHz <05/28/97...
**M1541/42/33/43 Aladdin V & V+ 50-100MHz ?...
**M1561/43/35D Aladdin 7 ArtX [no datasheet, some info] 11/08/99...
**M6117 386SX Single Chip PC <97...
**
**Support Chips:
**M1535/D South Bridge ?...
**
**May not exist:...
**Later Chipsets:...
**Other:...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**800 series
***810 (Whitney) 04/26/99...
***810L (Whitney) 04/26/99...
***810-DC100 (Whitney) 04/26/99...
***810e (Whitney) 09/27/99...
***810e2 (Whitney) 01/03/01...
***815 (Solano) 06/19/00...
***815e (Solano-2) 06/19/00...
***815em (Solano-?) 10/23/00...
***815ep (Solano-3) c:Nov'00...
***815p (Solano-3) c:Mar'01...
***815g (Solano-3) c:Sep'01...
***815eg (Solano-3) c:Sep'01...
***820 (Camino) 11/15/99...
***820e (Camino-2) 06/05/00...
***830M (Almador) 07/30/01...
***830MP (Almador) 07/30/01...
***830MG (Almador) 07/30/01...
***840 (Carmel) 10/25/99...
***845 (Brookdale) 09/10/01...
***845MP (Brookdale-M) 03/04/02...
***845MZ (Brookdale-M) 03/04/02...
***845E (Brookdale-E) 05/20/02...
***845G (Brookdale-G) 05/20/02...
***845GL (Brookdale-GL) 05/20/02...
***845GE (Brookdale-GE) 10/07/02...
***845PE (Brookdale-PE) 10/07/02...
***845GV (Brookdale-GV) 10/07/02...
***848P (Breeds Hill) c:Aug'03...
***850 (Tehama) 11/20/00...
***850E (Tehama-E) 05/06/02...
***852GM (Montara-GM) 01/14/03...
***852GMV (Montara-GM) ???...
***852PM (Montara-GM) 06/11/03...
***852GME (Montara-GM) 06/11/03...
***854 (?) 04/11/05...
***855GM (Montara-GM) 03/12/03...
***855GME (Montara-GM) 03/12/03...
***855PM (Odem) 03/12/03...
***860 (Colusa) 05/21/01...
***865G (Springdale) 05/21/03...
***865PE (Springdale-PE) 05/21/03...
***865P (Springdale-P) 05/21/03...
***865GV (Springdale-GV) c:Sep'03...
***875P (Canterwood) 04/14/03...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
**82C556/7/8N Viper-N Viper Notebook Chipset <05/25/95
***Notes:...
***Info:...
***Configurations:...
***Features:
CPU Interface
o Fully supports Intel’s 3.3V Pentium Processor and dual processor
configuration at 50, 60, and 66.667MHz
o Supports P54C, P55C, K5, and M1 processors
o Supports the Cyrix M1 Processor linear burst mode
o Three chip solution:
- 82C556 DBC (Data Buffer Controller) in a 160-pin PQFP (Plastic
Quad Flat Pack) or 176-pin TQFP (Thin Quad Flat Pack)
- 82C557 SYSC (System Controller) in a 208-pin PQFP or TQFP
- 82C558N IPC (Integrated Peripherals Controller) in a 208-pin
PQFP or TQFP
o Supports CPU address pipelining
Cache Interface
o Write-back/write-through, direct-mapped cache with size
selections: 64KB, 128KB, 256KB, 1MB and 2MB
o Support for synchronous and asynchronous SRAMs, pipelined sync-
hronous SRAMs, and Intel standard BSRAMs (BiCMOS SRAMs)
o Support for the Sony SONIC-ZWPT Cache Module
o Programmable cache write policy:
- Write-back
- Write-through
- Adaptive write-back
o Built-in tag auto-invalidation circuitry
o Fully programmable 3-2-2-2 asynchronous cache burst read/Write
cycles, 3-1-1-1/2-1-1-1 burst read/write support at 66/50MHz
o Options for cacheable, write protected. system and video BIOS
DRAM Interface
o Supports six banks of 64-bit wide DRAMs with 256KB, 512KB. 1MB,
2MB, 4MB, 8MB and 16MB addressing page mode DRAMs
o Supports DRAM configurations up to 512MB
o Supports 3-3-3-3 pipelined DRAM burst cycles
o 64-bit DRAM post write buffer
o Programmable drive currents for the DRAM control signals
o Hidden refresh with CAS-before-RAS refresh supported
o Support for two programmable non-cacheable memory regions
PCI Interface
o Interfaces the CPU and standard buses to both Peripheral Component
Interconnect (PCI) and VL bus operating in synchronous/async-
hronous modes, with VL bus always running at PCI bus operating
frequency
o Supports three PCI masters, one VL slave, and six ISA peripherals
o Supports PCI pre-snoop for PCI masters
o PCI byte/word merge support for CPU accesses to PCI bus,‘ and
support for PCI pre-fetch
o Burst mode PCI accesses to local memory supported
Miscellaneous
o Integrated two drive VL-based IDE controller
o Self-refresh supported during Suspend mode
o Support for flash ROM
o Shadow RAM option
o Transparent 8042 emulation for fast CPU reset and Gate A20
generation
o Supports Port 092h, fast Gate A20 and fast reset
o Includes a fully integrated 82C206 with external real-time clock
(RTC) interface
**82C556M/7M/8E Viper-N+ Viper Notebook Chipset c:96...
**82C566/7/8 Viper-Max Chipset Scalable MultiMedia PC Solution ?...
**82C571/572 486/Pentium c:93...
**82C576/7/8 Viper Xpress [no datasheet] ?...
**82C576/8/9 Viper XPress+ [no datasheet, some info] <01/16/97...
**82C596/597 PTMAWB Pentium Adaptive Write-back (Cobra) c:93...
**82C650/1/2 Discovery (Pentium Pro) [no datasheet] ?...
**82C681/2/6/7 386/486WB EISA c:92...
**82C683 386/486AWB EISA [no datasheet] ?...
**82C693/6/7 Pentium uP Write Back Cache EISA c:93...
**82C700 FireStar c:97...
**82C701 FireStar Plus c:97...
**82C750 Vendetta [no datasheet] ?...
**82c801 SCWB2 DX Single Chip Solution c:92...
**82C802 SCWB2 PC/AT Single Chip [no datasheet] ?...
**82C802G/GP System/Power Management Controller (cached) c:93...
**82C895 System/Power Management Controller (cached) c:Sep94...
**82C898 System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2 Buffer Devices <Nov94...
**82C822 PCIB (VLB-to-PCI bridge) c:94...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...
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