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**M1489/87       FinALi-486 PCI Chipset                         <Feb95
***Info:
ALi's M1489/M1487 PCI chipset is  the most cost effective PCI solution
available. M1489/M1487  enables top-to-bottom PCI in  486 CPU systems,
offering superior price/performance for mainstream PCI-ISA systems.

M1489/M1487 highly  integrates the DRAM controller,  L2 cache control-
ler,  Host,  PCI, and  ISA  interface, as  well  as  the standard  ISA
functions:  DMA controller,  interrupt controller,  timer/counter, RTC
(Real Time Clock),  and keyboard controller. Additionally, M1489/M1487
incorporates the high performance Local  Bus IDE allowing a system de-
signer to implement Local bus IDE with no additional cost. M1489/M1487
is a  highly integrated  solution requiring minimized  TTL components,
enabling PCI-ISA designs at costs equal to or lower than comparable VL
Bus designs.

M1489 (Cache Memory PCI Controller:  CMP) integrates the L2 cache con-
troller  and  the  DRAM  controller.  The  cache  controller  supports
write-back cache  policies and cache size  from 128K to 1M  byte in an
interleaved  or non-interleaved  configuration.   The DRAM  controller
interfaces DRAM  to the Host  bus, PCI bus,  and Link bus.   M1489 can
support   EDO  3/5V   DRAM,   standard  DRAM,   and  flexible   timing
select. M1489  also integrates  intelligent Host to  PCI, PCI  to Host
buffer  to achieve high  performance.  Also,  M1489 provides  the high
performance Local Bus IDE interface.

M1487 (ISA Bridge Controller: IBC) provides the bridge between the ISA
bus, PCI  bus, and Host bus.  IBC integrates the  common I/O functions
found in  today's ISA  based systems: a  seven channel DMA,  two 82C59
interrupt controllers,  8254 timer/ counter, deep  green function, and
control logic for NMI generation. IBC also has built-in 128 bytes RTC,
MC14069, KBC,  and 7406.   IBC also provides  the decode  for external
BIOS.

***Configurations:...
***Features:...
**M????          Genie, Quad Pentium  [no datasheet, some info]    c95...
**M1451/49       Aladdin    (Pentium) [no datasheet]                 ?...
**M1511/12/13    Aladdin II (Pentium) [no datasheet, some info] >Apr95...
**M1521/23       Aladdin III       50-66MHz                     <Nov96...
**M1531/33/43    Aladdin IV & IV+  50-83.3MHz                <05/28/97...
**M1541/42/33/43 Aladdin V & V+    50-100MHz                         ?...
**M1561/43/35D   Aladdin 7 ArtX    [no datasheet, some info]  11/08/99...
**M6117          386SX Single Chip PC                              <97...
**
**Support Chips:
**M1535/D        South Bridge                                        ?...
**
**May not exist:...
**Later Chipsets:...
**Other:...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**800 series
***810         (Whitney)       04/26/99...
***810L        (Whitney)       04/26/99...
***810-DC100   (Whitney)       04/26/99...
***810e        (Whitney)       09/27/99...
***810e2       (Whitney)       01/03/01...
***815         (Solano)        06/19/00...
***815e        (Solano-2)      06/19/00...
***815em       (Solano-?)      10/23/00...
***815ep       (Solano-3)      c:Nov'00...
***815p        (Solano-3)      c:Mar'01...
***815g        (Solano-3)      c:Sep'01...
***815eg       (Solano-3)      c:Sep'01...
***820         (Camino)        11/15/99...
***820e        (Camino-2)      06/05/00...
***830M        (Almador)       07/30/01...
***830MP       (Almador)       07/30/01...
***830MG       (Almador)       07/30/01...
***840         (Carmel)        10/25/99...
***845         (Brookdale)     09/10/01...
***845MP       (Brookdale-M)   03/04/02...
***845MZ       (Brookdale-M)   03/04/02...
***845E        (Brookdale-E)   05/20/02...
***845G        (Brookdale-G)   05/20/02...
***845GL       (Brookdale-GL)  05/20/02...
***845GE       (Brookdale-GE)  10/07/02...
***845PE       (Brookdale-PE)  10/07/02...
***845GV       (Brookdale-GV)  10/07/02...
***848P        (Breeds Hill)   c:Aug'03...
***850         (Tehama)        11/20/00...
***850E        (Tehama-E)      05/06/02...
***852GM       (Montara-GM)    01/14/03...
***852GMV      (Montara-GM)    ???...
***852PM       (Montara-GM)    06/11/03...
***852GME      (Montara-GM)    06/11/03...
***854         (?)             04/11/05...
***855GM       (Montara-GM)    03/12/03...
***855GME      (Montara-GM)    03/12/03...
***855PM       (Odem)          03/12/03...
***860         (Colusa)        05/21/01...
***865G        (Springdale)    05/21/03...
***865PE       (Springdale-PE) 05/21/03...
***865P        (Springdale-P)  05/21/03...
***865GV       (Springdale-GV) c:Sep'03...
***875P        (Canterwood)    04/14/03...
*Headland/G2...
**HT25          3-volt Core Logic for 386SX                    c:Dec92
***Info:
The HT25  is the industry’s first  3-Volt single chip  core logic with
integrated  power management  for  386SX based  3-Volt systems.   Pro-
grammable  power  management features  give  system manufacturers  the
flexibility of offering customized system solutions.

GENERAL DESCRIPTION
The HT25 is a  PC/AT1M compatible single-chip solution with integrated
power management  designed to operate in a  3-Volt system environment.
This highly integrated chip facilitates  the design of low power, high
performance portable systems.  The  HT25 supports 3-Volt 386SX CPUs at
clock  speeds  up  to  25MHz  at  2.7V to  3.6V.   It  supports  power
management functions using the System Management Mode (SMM).

Flexible  power  management is  the  cornerstone  of the  HT25.   This
approach provides  power saving  features that  can be  customized for
product  differentiation.  Power  management  features include  system
activity monitors  and general purpose  I/O pins.  The  HT25 generates
System Management  Interrupt (SMI) to process  activity information or
when access  to powered down  peripherals is detected.   Further power
savings are achieved through the HT25’s ability to control CPU and NPU
clocks and support for slow refresh and self refresh DRAMs.

The HT25 Memory Controller features BIOS Shadowing, Memory Relocation,
EMS, Page  Mode Memory Access and Interleaving.  The memory controller
allows memory banks to be reordered to allow more efficient memory in-
terleaving. The HT25 supports 512Kb, le, and 4Mb DRAMs.

The HT25 architecture  is optimized for 3-Volt system  designs, the SD
bus acknowledge input provides a flexible I/O bus architecture and the
XD bus is buffered directly  from the HT25.  Further, no external data
bus buffers are required for a closed 3V system.

***Configurations:...
***Features:...
**HT35          Single-Chip Peripheral Controller [partial info]     ?...
**HTK320        386DX Chip Set                                 c:Sep91...
**HTK340        "Shasta" 486 Chip Set                          c:Jun92...
**Support Chips:
**HT44          Secondary Cache                                c:Jun92...
**Other:...
*HMC (Hulon Microelectronics)...
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*Unresearched:...
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