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**82C835 Single CHIP 386sx AT Cache Controller c:Apr91
***Info:
The 82C835 interfaces directly with the 386sx and has been designed to
work closely with the 82C836 single chip AT (SCAT-sx). The 82C835
contains a 386sx cache controller incorporating the cache control
logic and tag RAM. Also included are several programmable registers
provided for configuration options. The ability to configure the cache
organization (Two-Way Set-Associative or Direct Mapped) and size (16KB
or 32KB) allows a flexible selection of external data SRAM.
In addition to the cache controller, the 82C835 integrates the AT I/O
channel command and address buffers and the corresponding control
logic. Many existing 80386sx system implementations require the use of
external buffers, latches, and transceivers to drive and receive the
commands and addresses. These systems also require external SSI logic
to control the operation of these buffers. Systems will typically save
six to seven external TTL buffers and five to six SSI gates when
implementing the channel interface with the 82C835. By integrating the
channel drivers and logic, the 82C835 reduces the system size and
complexity.
***Versions:
82C835
***Features:...
**F87000 Multi-Mode Peripheral Chip 11/23/93...
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**450NX (?) 06/29/98:
Chips:
[82454NX] (PXB) [82453NX] (MUX)
[82452NX] (RCG) [82451NX] (MIOC)
[82371EB] (PIIX4E),
CPUs: Single/Dual/Quad P-II Xeon/P-III Xeon
DRAM Types: FPM EDO 2-way Interleave 4-way Interleave
Mem Rows: 8
DRAM Density: 16Mbit 64Mbit
Max Mem: 8GB
ECC/Parity: Both
AGP speed: N/A
Bus Speed: 100
PCI Clock/Bus: 1/3
**????? (Profusion) c:99...
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**UM8881/8886 HB4 PCI Chipset "Super Energy Star Green"[no dsheet]c94
***Notes:...
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**UM8890 Pentium chipset [no datasheet] ?...
**
**Support Chips:
**UM82152 Cache Controller (AUStek A38152 clone) <91...
**UM82C852 Multi I/O For XT <91...
**UM82C206 Integrated Peripheral Controller <91...
**UM82c45x Serial/Parallel chips ?...
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