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**82C710   Universal Peripheral Controller                     c:Aug90
***Info:...
***Versions:
82C710

***Features:...
**82C711   Universal Peripheral Controller II                  c:Jan91...
**82C712   Universal Peripheral Controller II                  c:Jan91...
**82C721   Universal Peripheral Controller III                 c:May93...
**82C735   I/O Peripheral Controller With Printgine            c:Jul93...
**82C835   Single CHIP 386sx AT Cache Controller               c:Apr91...
**F87000   Multi-Mode Peripheral Chip                         11/23/93...
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*Contaq  . . . . . [no datasheets, some info]...
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**82395SX     Smart Cache                                     12/17/90
***Notes:...
**82396SX     Smart Cache                                     12/17/90...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
**GCK113        80386 AT Compatible Chip Set                   c:oct89
***Info:...
***Configurations:...
***Features:
o   Highly-integrated 25 MHz, AT-compatible (80386) three chip set.
o   Each device includes an integral, register-level configuration 
    system to manage system performance.
o   Software programmable wait-state generator and memory manager 
    that supports page mode and interleaved memory access.
o   Supports 'shadow RAM' for system and video BIOS ROM.
o   Supports 24 Mbytes of DRAM and either 256K or 1 Mb devices.
o   Supports 128K or 64K EPROM space.
o   Includes software configured decode logic for serial and 
    parallel I/O.
o   Supports 80387 or 80287 numeric coprocessor.
o   Supports connection to an EEPROM for non-volatile storage of 
    configuration setup data.
o   Eliminates DIP switches and jumpers.
o   Low board space requirements - laptop design is feasible.
o   Designed in 0.9 micron HCMOS.

**GCK181        Universal PS/2 Chip Set                        c:Mar89...
**HT11          Single 286 AT Chip [no datasheet]               <Aug90...
**HT12/+/A      Single 286 AT Chip with EMS support            c:Aug90...
**HT18          80386SX Single Chip                            c:Sep91...
**HT21          386SX/286 Single Chip (20 MHz)                 c:Aug91...
**HT22          386SX/286 Single Chip (25 MHz)                 c:Sep91...
**HT25          3-volt Core Logic for 386SX                    c:Dec92...
**HT35          Single-Chip Peripheral Controller [partial info]     ?...
**HTK320        386DX Chip Set                                 c:Sep91...
**HTK340        "Shasta" 486 Chip Set                          c:Jun92...
**Support Chips:
**HT44          Secondary Cache                                c:Jun92...
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